Merge pull request #5796 from YosysHQ/release/v0.64

Release version 0.64

CHANGELOG

@@ -2,16 +2,25 @@
 List of major changes and improvements between releases
 =======================================================
 
-Yosys 0.63 .. Yosys 0.64-dev
+Yosys 0.64 .. Yosys 0.65-dev
 --------------------------
 
+Yosys 0.63 .. Yosys 0.64
+--------------------------
+ * New commands and options
+    - Added "synth_analogdevices" pass to support synthesis
+      for Analog Devices FPGAs.
+
  * Various
     - Removed rarely-used options from ABC/ABC9.
+       - Removed "-S" option from "abc" pass.
+       - Removed "-fast" option from "abc9" and "abc9_exe".
        - Calls to "abc -g AND -fast" to map logic to
          AND-Inverter Graph form should be replaced with
          "aigmap".
        - The above change was made to SBY, so we recommend
          updating it.
+    - Added hardware latch support for Gowin FPGAs.
 
 Yosys 0.62 .. Yosys 0.63
 --------------------------

Makefile

@@ -161,7 +161,7 @@ ifeq ($(OS), Haiku)
 CXXFLAGS += -D_DEFAULT_SOURCE
 endif
 
-YOSYS_VER := 0.63
+YOSYS_VER := 0.64
 
 ifneq (, $(shell command -v git 2>/dev/null))
 ifneq (, $(shell git rev-parse --git-dir 2>/dev/null))

docs/source/conf.py

@@ -6,7 +6,7 @@ import os
 project = 'YosysHQ Yosys'
 author = 'YosysHQ GmbH'
 copyright ='2026 YosysHQ GmbH'
-yosys_ver = "0.63"
+yosys_ver = "0.64"
 
 # select HTML theme
 html_theme = 'furo-ys'