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Add some tests

Copied from Efinix.

* fsm is broken
* latch and tribuf are not implemented yet
* memory maps to dram
This commit is contained in:
Pepijn de Vos 2019-10-21 16:25:15 +02:00
parent 03457ee13e
commit 83fbfe0964
10 changed files with 224 additions and 0 deletions

50
tests/arch/gowin/mux.ys Normal file
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read_verilog ../common/mux.v
design -save read
hierarchy -top mux2
proc
equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux2 # Constrain all select calls below inside the top module
select -assert-count 1 t:LUT3
select -assert-count 3 t:IBUF
select -assert-count 1 t:OBUF
select -assert-none t:LUT3 t:IBUF t:OBUF %% t:* %D
design -load read
hierarchy -top mux4
proc
equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux4 # Constrain all select calls below inside the top module
select -assert-count 2 t:LUT4
select -assert-count 6 t:IBUF
select -assert-count 1 t:OBUF
select -assert-none t:LUT4 t:IBUF t:OBUF %% t:* %D
design -load read
hierarchy -top mux8
proc
equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module
select -assert-count 5 t:LUT4
select -assert-count 11 t:IBUF
select -assert-count 1 t:OBUF
select -assert-none t:LUT4 t:IBUF t:OBUF %% t:* %D
design -load read
hierarchy -top mux16
proc
equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux16 # Constrain all select calls below inside the top module
select -assert-count 9 t:LUT4
select -assert-count 3 t:LUT3
select -assert-count 20 t:IBUF
select -assert-count 1 t:OBUF
select -assert-none t:LUT4 t:LUT3 t:IBUF t:OBUF %% t:* %D