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Merge 0afc91ec09
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@ -25,6 +25,15 @@
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YOSYS_NAMESPACE_BEGIN
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YOSYS_NAMESPACE_BEGIN
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/**
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* This file implements BitPatternPool for efficiently storing
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* sets of fixed-width 2-valued logic constants compressed as "bit patterns"
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* represented as bits_t. A bit pattern is a signal in 3-valued logic:
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* 0, 1, a ("any" or "don't care").
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*
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* BitPatternPool does not permit adding new patterns, only removing.
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* Its intended use case is in analysing cases in case/match constructs in HDL.
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*/
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struct BitPatternPool
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struct BitPatternPool
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{
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{
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int width;
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int width;
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@ -67,6 +76,9 @@ struct BitPatternPool
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}
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}
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}
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}
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/**
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* Constructs a pool of all possible patterns (all don't-care bits)
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*/
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BitPatternPool(int width)
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BitPatternPool(int width)
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{
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{
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this->width = width;
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this->width = width;
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@ -78,6 +90,10 @@ struct BitPatternPool
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}
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}
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}
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}
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/**
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* Convert a constant SigSpec to a pattern. Normalize Yosys many-valued
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* to three-valued logic.
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*/
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bits_t sig2bits(RTLIL::SigSpec sig)
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bits_t sig2bits(RTLIL::SigSpec sig)
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{
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{
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bits_t bits;
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bits_t bits;
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@ -88,6 +104,12 @@ struct BitPatternPool
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return bits;
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return bits;
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}
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}
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/**
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* Do two patterns match?
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* A pattern matches another when all their bits match.
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* A bit matches another if their values are equal.
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* A bit also matches another if either of their values is "any"
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*/
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bool match(bits_t a, bits_t b)
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bool match(bits_t a, bits_t b)
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{
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{
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log_assert(int(a.bitdata.size()) == width);
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log_assert(int(a.bitdata.size()) == width);
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@ -98,6 +120,13 @@ struct BitPatternPool
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return true;
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return true;
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}
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}
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/**
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* Does sig match any pattern in the pool?
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* For example:
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* pool({aaa}).has_any(01a) == true
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* pool({011}).has_any(01a) == true
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* pool({111}).has_any(01a) == false
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*/
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bool has_any(RTLIL::SigSpec sig)
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bool has_any(RTLIL::SigSpec sig)
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{
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{
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bits_t bits = sig2bits(sig);
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bits_t bits = sig2bits(sig);
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@ -107,6 +136,14 @@ struct BitPatternPool
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return false;
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return false;
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}
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}
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/**
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* Does sig match a pattern in the pool such that
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* all non-"any" bits in sig are not "any" in the pattern?
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* For example:
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* pool({aaa}).has_all(01a) == false
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* pool({011}).has_all(01a) == true
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* pool({111}).has_any(01a) == false
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*/
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bool has_all(RTLIL::SigSpec sig)
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bool has_all(RTLIL::SigSpec sig)
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{
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{
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bits_t bits = sig2bits(sig);
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bits_t bits = sig2bits(sig);
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return false;
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return false;
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}
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}
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/**
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* Remove a pattern from the pool, splitting what's left. True if success.
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* For example:
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* Taking 011 out of pool({01a}) -> pool({010}), returns true.
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* Taking 011 out of pool({010}) does nothing, returns false.
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*/
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bool take(RTLIL::SigSpec sig)
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bool take(RTLIL::SigSpec sig)
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{
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{
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bool status = false;
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bool status = false;
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return status;
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return status;
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}
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}
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/**
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* Remove all patterns. Returns false if already empty.
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*/
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bool take_all()
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bool take_all()
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{
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{
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if (database.empty())
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if (database.empty())
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