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intel_alm: ABC9 sequential optimisations

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Dan Ravensloft 2020-05-23 12:52:13 +01:00 • committed by Marcelina Kościelnicka
parent a9b61080a4
commit 83cde2d02b
7 changed files with 149 additions and 19 deletions
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18
techlibs/intel_alm/common/abc9_map.v Normal file
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// This file exists to map purely-synchronous flops to ABC9 flops, while
// mapping flops with asynchronous-clear as boxes, this is because ABC9
// doesn't support asynchronous-clear flops in sequential synthesis.
module MISTRAL_FF(
input DATAIN, CLK, ACLR, ENA, SCLR, SLOAD, SDATA,
output reg Q
);
parameter _TECHMAP_CONSTMSK_ACLR_ = 1'b0;
// If the async-clear is constant, we assume it's disabled.
if (_TECHMAP_CONSTMSK_ACLR_ != 1'b0)
MISTRAL_FF_SYNCONLY _TECHMAP_REPLACE_ (.DATAIN(DATAIN), .CLK(CLK), .ENA(ENA), .SCLR(SCLR), .SLOAD(SLOAD), .SDATA(SDATA), .Q(Q));
else
wire _TECHMAP_FAIL_ = 1;
endmodule