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	machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
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					 2 changed files with 6 additions and 6 deletions
				
			
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			@ -28,7 +28,7 @@ endmodule
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module  \$_DFF_P_ (input D, C, output Q); FACADE_FF #(.CEMUX("1"), .CLKMUX("CLK"), .LSRMUX("LSR"), .REGSET("RESET")) _TECHMAP_REPLACE_ (.CLK(C), .LSR(1'b0), .DI(D), .Q(Q)); endmodule
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// IO- "$__" cells for the iopadmap pass.
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module  \$__FACADE_OUTPAD (input I, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .EN(1'b1)); endmodule
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module  \$__FACADE_OUTPAD (input I, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .T(1'b1)); endmodule
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module  \$__FACADE_INPAD (input I, output O); FACADE_IO #(.DIR("INPUT")) _TECHMAP_REPLACE_ (.PAD(I), .O(O)); endmodule
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module  \$__FACADE_TOUTPAD (input I, OE, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .EN(OE)); endmodule
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module  \$__FACADE_TINOUTPAD (input I, OE, output O, inout B); FACADE_IO #(.DIR("BIDIR")) _TECHMAP_REPLACE_ (.PAD(B), .I(I), .O(O), .EN(OE)); endmodule
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module  \$__FACADE_TOUTPAD (input I, OE, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .T(OE)); endmodule
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module  \$__FACADE_TINOUTPAD (input I, OE, output O, inout B); FACADE_IO #(.DIR("BIDIR")) _TECHMAP_REPLACE_ (.PAD(B), .I(I), .O(O), .T(OE)); endmodule
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			@ -162,16 +162,16 @@ module FACADE_IO #(
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	parameter DIR = "INPUT"
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) (
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	inout PAD,
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	input I, EN,
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	input I, T,
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	output O
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);
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	generate
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		if (DIR == "INPUT") begin
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			assign O = PAD;
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		end else if (DIR == "OUTPUT") begin
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			assign PAD = EN ? I : 1'bz;
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			assign PAD = T ? I : 1'bz;
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		end else if (DIR == "BIDIR") begin
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			assign PAD = EN ? I : 1'bz;
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			assign PAD = T ? I : 1'bz;
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			assign O = PAD;
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		end else begin
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			ERROR_UNKNOWN_IO_MODE error();
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