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	Use undef (x/z vs. NaN) rules for real values from IEEE Std 1800-2012
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					 2 changed files with 11 additions and 0 deletions
				
			
		|  | @ -783,6 +783,8 @@ double AstNode::asReal(bool is_signed) | ||||||
| 
 | 
 | ||||||
| 		double v = 0; | 		double v = 0; | ||||||
| 		for (size_t i = 0; i < val.bits.size(); i++) | 		for (size_t i = 0; i < val.bits.size(); i++) | ||||||
|  | 			// IEEE Std 1800-2012 Par 6.12.2: Individual bits that are x or z in
 | ||||||
|  | 			// the net or the variable shall be treated as zero upon conversion.
 | ||||||
| 			if (val.bits.at(i) == RTLIL::State::S1) | 			if (val.bits.at(i) == RTLIL::State::S1) | ||||||
| 				v += exp2(i); | 				v += exp2(i); | ||||||
| 		if (is_negative) | 		if (is_negative) | ||||||
|  |  | ||||||
|  | @ -1625,6 +1625,15 @@ skip_dynamic_range_lvalue_expansion:; | ||||||
| 						if (a.bits[i] != b.bits[i]) | 						if (a.bits[i] != b.bits[i]) | ||||||
| 							a.bits[i] = RTLIL::State::Sx; | 							a.bits[i] = RTLIL::State::Sx; | ||||||
| 					newNode = mkconst_bits(a.bits, sign_hint); | 					newNode = mkconst_bits(a.bits, sign_hint); | ||||||
|  | 				} else if (children[1]->isConst() && children[2]->isConst()) { | ||||||
|  | 					newNode = new AstNode(AST_REALVALUE); | ||||||
|  | 					if (children[1]->asReal(sign_hint) == children[2]->asReal(sign_hint)) | ||||||
|  | 						newNode->realvalue = children[1]->asReal(sign_hint); | ||||||
|  | 					else | ||||||
|  | 						// IEEE Std 1800-2012 Sec. 11.4.11 states that the entry in Table 7-1 for
 | ||||||
|  | 						// the data type in question should be returned if the ?: is ambiguous. The
 | ||||||
|  | 						// value in Table 7-1 for the 'real' type is 0.0.
 | ||||||
|  | 						newNode->realvalue = 0.0; | ||||||
| 				} | 				} | ||||||
| 			} | 			} | ||||||
| 			break; | 			break; | ||||||
|  |  | ||||||
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