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	Add "write_aiger -I -O -B"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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					 1 changed files with 36 additions and 2 deletions
				
			
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			@ -100,7 +100,7 @@ struct AigerWriter
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		return aig_map.at(bit);
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	}
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	AigerWriter(Module *module, bool zinit_mode) : module(module), zinit_mode(zinit_mode), sigmap(module)
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	AigerWriter(Module *module, bool zinit_mode, bool imode, bool omode, bool bmode) : module(module), zinit_mode(zinit_mode), sigmap(module)
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	{
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		pool<SigBit> undriven_bits;
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		pool<SigBit> unused_bits;
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			@ -293,6 +293,10 @@ struct AigerWriter
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			aig_map[bit] = 2*aig_m;
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		}
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		if (imode && input_bits.empty()) {
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			aig_m++, aig_i++;
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		}
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		if (zinit_mode)
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		{
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			for (auto it : ff_map) {
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			@ -371,6 +375,11 @@ struct AigerWriter
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			aig_outputs.push_back(bit2aig(bit));
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		}
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		if (omode && output_bits.empty()) {
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			aig_o++;
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			aig_outputs.push_back(0);
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		}
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		for (auto it : asserts) {
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			aig_b++;
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			int bit_a = bit2aig(it.first);
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			@ -378,6 +387,11 @@ struct AigerWriter
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			aig_outputs.push_back(mkgate(bit_a^1, bit_en));
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		}
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		if (bmode && asserts.empty()) {
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			aig_b++;
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			aig_outputs.push_back(0);
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		}
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		for (auto it : assumes) {
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			aig_c++;
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			int bit_a = bit2aig(it.first);
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			@ -689,6 +703,11 @@ struct AigerBackend : public Backend {
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		log("    -vmap <filename>\n");
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		log("        like -map, but more verbose\n");
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		log("\n");
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		log("    -I, -O, -B\n");
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		log("        If the design contains no input/output/assert then create one\n");
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		log("        dummy input/output/bad_state pin to make the tools reading the\n");
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		log("        AIGER file happy.\n");
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		log("\n");
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	}
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	void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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	{
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			@ -697,6 +716,9 @@ struct AigerBackend : public Backend {
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		bool miter_mode = false;
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		bool symbols_mode = false;
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		bool verbose_map = false;
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		bool imode = false;
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		bool omode = false;
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		bool bmode = false;
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		std::string map_filename;
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		log_header(design, "Executing AIGER backend.\n");
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			@ -729,6 +751,18 @@ struct AigerBackend : public Backend {
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				verbose_map = true;
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				continue;
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			}
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			if (args[argidx] == "-I") {
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				imode = true;
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				continue;
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			}
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			if (args[argidx] == "-O") {
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				omode = true;
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				continue;
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			}
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			if (args[argidx] == "-B") {
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				bmode = true;
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				continue;
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			}
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			break;
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		}
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		extra_args(f, filename, args, argidx);
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			@ -738,7 +772,7 @@ struct AigerBackend : public Backend {
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		if (top_module == nullptr)
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			log_error("Can't find top module in current design!\n");
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		AigerWriter writer(top_module, zinit_mode);
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		AigerWriter writer(top_module, zinit_mode, imode, omode, bmode);
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		writer.write_aiger(*f, ascii_mode, miter_mode, symbols_mode);
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		if (!map_filename.empty()) {
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