mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-09 23:53:26 +00:00
Code Activity

Docs: Shorten cmd:ref

Browse source
This commit is contained in:
Krystine Sherwin 2024-05-03 13:16:48 +12:00
parent e4ec3717bc
commit 829e02ec5b
No known key found for this signature in database
22 changed files with 296 additions and 297 deletions
Download patch file Download diff file Expand all files Collapse all files

8
docs/source/yosys_internals/techmap.rst
View file

@ -1,7 +1,7 @@
Techmap by example
------------------
As a quick recap, the :cmd:ref:`techmap` command replaces cells in the design
As a quick recap, the `techmap` command replaces cells in the design
with implementations given as Verilog code (called "map files"). It can replace
Yosys' internal cell types (such as `$or`) as well as user-defined cell types.
@ -87,14 +87,14 @@ Scripting in map modules
- You can even call techmap recursively!
- Example use-cases:
- Using always blocks in map module: call :cmd:ref:`proc`
- Perform expensive optimizations (such as :cmd:ref:`freduce`) on cells
- Using always blocks in map module: call `proc`
- Perform expensive optimizations (such as `freduce`) on cells
where this is known to work well.
- Interacting with custom commands.
.. note:: PROTIP:
Commands such as :cmd:ref:`shell`, ``show -pause``, and :cmd:ref:`dump` can
Commands such as `shell`, ``show -pause``, and `dump` can
be used in the ``_TECHMAP_DO_*`` scripts for debugging map modules.
Example: