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Docs: Shorten cmd:ref
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@ -35,7 +35,7 @@ about the internal data storage format used in Yosys and the classes that it
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provides.
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This document will focus on the much simpler version of RTLIL left after the
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commands :cmd:ref:`proc` and :cmd:ref:`memory` (or :yoscrypt:`memory -nomap`):
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commands `proc` and `memory` (or :yoscrypt:`memory -nomap`):
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.. figure:: /_images/internals/simplified_rtlil.*
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:class: width-helper invert-helper
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@ -56,7 +56,7 @@ It is possible to only work on this simpler version:
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}
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When trying to understand what a command does, creating a small test case to
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look at the output of :cmd:ref:`dump` and :cmd:ref:`show` before and after the
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look at the output of `dump` and `show` before and after the
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command has been executed can be helpful.
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:doc:`/using_yosys/more_scripting/selections` has more information on using
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these commands.
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@ -152,7 +152,7 @@ Most commands modify existing modules, not create new ones.
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When modifying existing modules, stick to the following DOs and DON'Ts:
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- Do not remove wires. Simply disconnect them and let a successive
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:cmd:ref:`clean` command worry about removing it.
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`clean` command worry about removing it.
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- Use ``module->fixup_ports()`` after changing the ``port_*`` properties of
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wires.
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- You can safely remove cells or change the ``connections`` property of a cell,
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