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block ram mapping for standard modes

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This commit is contained in:
Miodrag Milanovic 2024-05-17 15:59:18 +02:00
parent 9d6b47466f
commit 829dd62054
3 changed files with 109 additions and 39 deletions
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56
techlibs/nanoxplore/brams.txt
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@ -1,26 +1,46 @@
ram block $__NX_RAM_ {
abits 13;
widths 1 2 4 9 per_port;
option "STD_MODE" "NOECC_48kx1" {
# only 32k used
abits 15;
widths 1 global;
}
option "STD_MODE" "NOECC_24kx2" {
# only 16k used
abits 14;
widths 2 global;
}
option "STD_MODE" "NOECC_16kx3" {
abits 14;
widths 3 global;
}
option "STD_MODE" "NOECC_12kx4" {
# only 8k used
abits 13;
widths 4 global;
}
option "STD_MODE" "NOECC_8kx6" {
abits 13;
widths 6 global;
}
option "STD_MODE" "NOECC_6kx8" {
# only 4k used
abits 12;
widths 8 global;
}
option "STD_MODE" "NOECC_4kx12" {
abits 12;
widths 12 global;
}
option "STD_MODE" "NOECC_2kx24" {
abits 11;
widths 24 global;
}
cost 64;
init no_undef;
port srsw "A" "B" {
clock anyedge;
clken;
portoption "WRITEMODE" "NORMAL" {
rdwr no_change;
}
portoption "WRITEMODE" "WRITETHROUGH" {
rdwr new;
}
portoption "WRITEMODE" "READBEFOREWRITE" {
rdwr old;
}
option "RESETMODE" "SYNC" {
rdsrst zero ungated block_wr;
}
option "RESETMODE" "ASYNC" {
rdarst zero;
}
rdinit zero;
rdwr no_change;
rdinit none;
}
}