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Revert "Add groups to command reference"

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N. Engelhardt 2025-07-23 14:41:49 +00:00 • committed by GitHub
parent 2223d7848b
commit 81f87ce6ed
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124 changed files with 474 additions and 2035 deletions
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6
passes/sat/assertpmux.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
#include "kernel/utils.h"
@ -183,11 +182,6 @@ struct AssertpmuxWorker
struct AssertpmuxPass : public Pass {
AssertpmuxPass() : Pass("assertpmux", "adds asserts for parallel muxes") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/async2sync.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
#include "kernel/ffinit.h"
#include "kernel/ff.h"
@ -28,11 +27,6 @@ PRIVATE_NAMESPACE_BEGIN
struct Async2syncPass : public Pass {
Async2syncPass() : Pass("async2sync", "convert async FF inputs to sync circuits") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/clk2fflogic.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
#include "kernel/ffinit.h"
#include "kernel/ff.h"
@ -34,11 +33,6 @@ struct SampledSig {
struct Clk2fflogicPass : public Pass {
Clk2fflogicPass() : Pass("clk2fflogic", "convert clocked FFs to generic $ff cells") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/cutpoint.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
USING_YOSYS_NAMESPACE
@ -26,11 +25,6 @@ PRIVATE_NAMESPACE_BEGIN
struct CutpointPass : public Pass {
CutpointPass() : Pass("cutpoint", "adds formal cut points to the design") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

10
passes/sat/expose.cc
View file

@ -17,10 +17,11 @@
*
*/
#include "kernel/yosys.h"
#include "kernel/register.h"
#include "kernel/celltypes.h"
#include "kernel/sigtools.h"
#include "kernel/log_help.h"
#include "kernel/rtlil.h"
#include "kernel/log.h"
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
@ -216,11 +217,6 @@ RTLIL::Wire *add_new_wire(RTLIL::Module *module, RTLIL::IdString name, int width
struct ExposePass : public Pass {
ExposePass() : Pass("expose", "convert internal signals to module ports") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("passes/cmds");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/fmcombine.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
#include "kernel/celltypes.h"
@ -238,11 +237,6 @@ struct FmcombineWorker
struct FmcombinePass : public Pass {
FmcombinePass() : Pass("fmcombine", "combine two instances of a cell into one") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/fminit.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
USING_YOSYS_NAMESPACE
@ -26,11 +25,6 @@ PRIVATE_NAMESPACE_BEGIN
struct FminitPass : public Pass {
FminitPass() : Pass("fminit", "set init values/sequences for formal") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/formalff.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
#include "kernel/ffinit.h"
#include "kernel/ff.h"
@ -487,11 +486,6 @@ void HierarchyWorker::propagate()
struct FormalFfPass : public Pass {
FormalFfPass() : Pass("formalff", "prepare FFs for formal") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

14
passes/sat/freduce.cc
View file

@ -17,12 +17,17 @@
*
*/
#include "kernel/register.h"
#include "kernel/celltypes.h"
#include "kernel/consteval.h"
#include "kernel/sigtools.h"
#include "kernel/log.h"
#include "kernel/satgen.h"
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <algorithm>
#include <limits>
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
@ -756,11 +761,6 @@ struct FreduceWorker
struct FreducePass : public Pass {
FreducePass() : Pass("freduce", "perform functional reduction") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

10
passes/sat/miter.cc
View file

@ -17,8 +17,9 @@
*
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/register.h"
#include "kernel/rtlil.h"
#include "kernel/log.h"
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
@ -394,11 +395,6 @@ void create_miter_assert(struct Pass *that, std::vector<std::string> args, RTLIL
struct MiterPass : public Pass {
MiterPass() : Pass("miter", "automatically create a miter circuit") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/mutate.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
USING_YOSYS_NAMESPACE
@ -729,11 +728,6 @@ void mutate_cnot(Design *design, const mutate_opts_t &opts, bool one)
struct MutatePass : public Pass {
MutatePass() : Pass("mutate", "generate or apply design mutations") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/qbfsat.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/consteval.h"
#include "qbfsat.h"
@ -505,11 +504,6 @@ QbfSolveOptions parse_args(const std::vector<std::string> &args) {
struct QbfSatPass : public Pass {
QbfSatPass() : Pass("qbfsat", "solve a 2QBF-SAT problem in the circuit") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/recover_names.cc
View file

@ -23,7 +23,6 @@
#include "kernel/celltypes.h"
#include "kernel/utils.h"
#include "kernel/satgen.h"
#include "kernel/log_help.h"
#include <algorithm>
#include <queue>
@ -691,11 +690,6 @@ struct RecoverNamesWorker {
struct RecoverNamesPass : public Pass {
RecoverNamesPass() : Pass("recover_names", "Execute a lossy mapping command and recover original netnames") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("passes/opt");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

14
passes/sat/sat.cc
View file

@ -21,12 +21,17 @@
// Niklas Een and Niklas Sörensson (2003)
// http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.4.8161
#include "kernel/register.h"
#include "kernel/celltypes.h"
#include "kernel/consteval.h"
#include "kernel/sigtools.h"
#include "kernel/log.h"
#include "kernel/satgen.h"
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include <stdlib.h>
#include <stdio.h>
#include <algorithm>
#include <errno.h>
#include <string.h>
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
@ -897,11 +902,6 @@ void print_qed()
struct SatPass : public Pass {
SatPass() : Pass("sat", "solve a SAT problem in the circuit") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

6
passes/sat/supercover.cc
View file

@ -18,7 +18,6 @@
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
#include "kernel/sigtools.h"
USING_YOSYS_NAMESPACE
@ -26,11 +25,6 @@ PRIVATE_NAMESPACE_BEGIN
struct SupercoverPass : public Pass {
SupercoverPass() : Pass("supercover", "add hi/lo cover cells for each wire bit") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

12
passes/sat/synthprop.cc
View file

@ -18,9 +18,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "kernel/yosys.h"
#include "kernel/log_help.h"
YOSYS_NAMESPACE_BEGIN
@ -181,13 +179,7 @@ void SynthPropWorker::run()
struct SyntProperties : public Pass {
SyntProperties() : Pass("synthprop", "synthesize SVA properties") { }
bool formatted_help() override {
auto *help = PrettyHelp::get_current();
help->set_group("formal");
return false;
}
void help() override
virtual void help()
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@ -216,7 +208,7 @@ struct SyntProperties : public Pass {
log("\n");
}
void execute(std::vector<std::string> args, RTLIL::Design* design) override
virtual void execute(std::vector<std::string> args, RTLIL::Design* design)
{
log_header(design, "Executing SYNTHPROP pass.\n");
SynthPropWorker worker(design);