mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 17:15:33 +00:00
Code Activity

Updated to support Amba comments and .h files

Browse source
This commit is contained in:
Akash Levy 2024-05-14 13:25:43 -07:00
parent 667c3375e8
commit 81b542fd31
2 changed files with 10 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

9
frontends/verific/verific.cc
View file

@ -3397,9 +3397,18 @@ struct VerificPass : public Pass {
// Treat .v as SystemVerilog too (overriding default behavior to treat it as VERILOG_2000)
hdl_file_sort::RemoveFileExt(".v");
hdl_file_sort::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
hdl_file_sort::AddFileExtMode(".vh", veri_file::SYSTEM_VERILOG);
hdl_file_sort::AddFileExtMode(".sv", veri_file::SYSTEM_VERILOG);
hdl_file_sort::AddFileExtMode(".svh", veri_file::SYSTEM_VERILOG);
hdl_file_sort::AddFileExtMode(".svp", veri_file::SYSTEM_VERILOG);
hdl_file_sort::AddFileExtMode(".h", veri_file::SYSTEM_VERILOG);
veri_file::RemoveFileExt(".v");
veri_file::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
veri_file::AddFileExtMode(".vh", veri_file::SYSTEM_VERILOG);
veri_file::AddFileExtMode(".sv", veri_file::SYSTEM_VERILOG);
veri_file::AddFileExtMode(".svh", veri_file::SYSTEM_VERILOG);
veri_file::AddFileExtMode(".svp", veri_file::SYSTEM_VERILOG);
veri_file::AddFileExtMode(".h", veri_file::SYSTEM_VERILOG);
// Select analyze function
auto analyze_function = (args[argidx] == "-auto_discover") ? hdl_file_sort::AnalyzeDiscoveredFiles : hdl_file_sort::AnalyzeSortedFiles;

2
verific

@ -1 +1 @@
Subproject commit 89293741027af260341a07b315d63e447e31bcef
Subproject commit eda746e1d8ee7b243a1ff66f3e5e51a4e4af6963