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Update test for Pass::call_on_module()

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Eddie Hung 2019-07-02 08:22:31 -07:00
parent f1504696e5
commit 81a717e9b7

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@ -9,7 +9,7 @@ read_verilog -formal <<EOT
endmodule
module other;
wire [1023:0] _DELETE = "delete c:bar";
wire [1023:0] _DELETE = "cd; delete c:bar";
endmodule
EOT