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Added Xilinx example for Basys3 board

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Clifford Wolf 2015-02-01 17:09:34 +01:00
parent 6978f3a77b
commit 816fe6bbe0
9 changed files with 84 additions and 1 deletions
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techlibs/xilinx/example_basys3/run_vivado.tcl Normal file
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read_xdc example.xdc
read_edif example.edif
link_design -part xc7a35tcpg236-1 -top example
opt_design
place_design
route_design
report_utilization
report_timing
write_bitstream -force example.bit