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Undo the weird abc changes

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This commit is contained in:
Akash Levy 2026-02-03 23:21:48 -08:00
parent 8e5d24aa6b
commit 807df40422
2 changed files with 28 additions and 64 deletions
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4
frontends/verific/verific.cc
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@ -3143,9 +3143,6 @@ std::string verific_import(Design *design, const std::map<std::string,std::strin
if (verific_opt) {
log(" Optimizing netlist for %s.\n", it->first.c_str());
// log(" Inferring clock enable muxes for %s.\n", it->first.c_str());
// nl->InferClockEnableMux();
log(" Running post-elaboration for %s.\n", it->first.c_str());
nl->PostElaborationProcess();
@ -3866,7 +3863,6 @@ struct VerificPass : public Pass {
unsigned verilog_mode = veri_file::UNDEFINED;
#ifdef VERIFIC_VHDL_SUPPORT
unsigned vhdl_mode = vhdl_file::UNDEFINED;
bool is_formal = false;
#endif
bool is_formal = false;
#else