mirror of
https://github.com/YosysHQ/yosys
synced 2025-06-29 09:28:46 +00:00
Merge pull request #4459 from YosysHQ/micko/vanilla_verific
Verific build support improvements
This commit is contained in:
commit
8024688b1d
4 changed files with 393 additions and 285 deletions
32
Makefile
32
Makefile
|
@ -17,10 +17,12 @@ ENABLE_READLINE := 1
|
||||||
ENABLE_EDITLINE := 0
|
ENABLE_EDITLINE := 0
|
||||||
ENABLE_GHDL := 0
|
ENABLE_GHDL := 0
|
||||||
ENABLE_VERIFIC := 0
|
ENABLE_VERIFIC := 0
|
||||||
|
ENABLE_VERIFIC_SYSTEMVERILOG := 1
|
||||||
|
ENABLE_VERIFIC_VHDL := 1
|
||||||
|
ENABLE_VERIFIC_HIER_TREE := 1
|
||||||
|
ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS := 1
|
||||||
ENABLE_VERIFIC_EDIF := 0
|
ENABLE_VERIFIC_EDIF := 0
|
||||||
ENABLE_VERIFIC_LIBERTY := 0
|
ENABLE_VERIFIC_LIBERTY := 0
|
||||||
DISABLE_VERIFIC_EXTENSIONS := 0
|
|
||||||
DISABLE_VERIFIC_VHDL := 0
|
|
||||||
ENABLE_COVER := 1
|
ENABLE_COVER := 1
|
||||||
ENABLE_LIBYOSYS := 0
|
ENABLE_LIBYOSYS := 0
|
||||||
ENABLE_ZLIB := 1
|
ENABLE_ZLIB := 1
|
||||||
|
@ -471,8 +473,24 @@ endif
|
||||||
LIBS_VERIFIC =
|
LIBS_VERIFIC =
|
||||||
ifeq ($(ENABLE_VERIFIC),1)
|
ifeq ($(ENABLE_VERIFIC),1)
|
||||||
VERIFIC_DIR ?= /usr/local/src/verific_lib
|
VERIFIC_DIR ?= /usr/local/src/verific_lib
|
||||||
VERIFIC_COMPONENTS ?= verilog database util containers hier_tree
|
VERIFIC_COMPONENTS ?= database util containers
|
||||||
ifneq ($(DISABLE_VERIFIC_VHDL),1)
|
ifeq ($(ENABLE_VERIFIC_HIER_TREE),1)
|
||||||
|
VERIFIC_COMPONENTS += hier_tree
|
||||||
|
CXXFLAGS += -DVERIFIC_HIER_TREE_SUPPORT
|
||||||
|
else
|
||||||
|
ifneq ($(wildcard $(VERIFIC_DIR)/hier_tree),)
|
||||||
|
VERIFIC_COMPONENTS += hier_tree
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
ifeq ($(ENABLE_VERIFIC_SYSTEMVERILOG),1)
|
||||||
|
VERIFIC_COMPONENTS += verilog
|
||||||
|
CXXFLAGS += -DVERIFIC_SYSTEMVERILOG_SUPPORT
|
||||||
|
else
|
||||||
|
ifneq ($(wildcard $(VERIFIC_DIR)/verilog),)
|
||||||
|
VERIFIC_COMPONENTS += verilog
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
ifeq ($(ENABLE_VERIFIC_VHDL),1)
|
||||||
VERIFIC_COMPONENTS += vhdl
|
VERIFIC_COMPONENTS += vhdl
|
||||||
CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
|
CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
|
||||||
else
|
else
|
||||||
|
@ -488,9 +506,13 @@ ifeq ($(ENABLE_VERIFIC_LIBERTY),1)
|
||||||
VERIFIC_COMPONENTS += synlib
|
VERIFIC_COMPONENTS += synlib
|
||||||
CXXFLAGS += -DVERIFIC_LIBERTY_SUPPORT
|
CXXFLAGS += -DVERIFIC_LIBERTY_SUPPORT
|
||||||
endif
|
endif
|
||||||
ifneq ($(DISABLE_VERIFIC_EXTENSIONS),1)
|
ifeq ($(ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS),1)
|
||||||
VERIFIC_COMPONENTS += extensions
|
VERIFIC_COMPONENTS += extensions
|
||||||
CXXFLAGS += -DYOSYSHQ_VERIFIC_EXTENSIONS
|
CXXFLAGS += -DYOSYSHQ_VERIFIC_EXTENSIONS
|
||||||
|
else
|
||||||
|
ifneq ($(wildcard $(VERIFIC_DIR)/extensions),)
|
||||||
|
VERIFIC_COMPONENTS += extensions
|
||||||
|
endif
|
||||||
endif
|
endif
|
||||||
CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC
|
CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC
|
||||||
ifeq ($(OS), Darwin)
|
ifeq ($(OS), Darwin)
|
||||||
|
|
|
@ -10,7 +10,7 @@ EXTRA_TARGETS += share/verific
|
||||||
share/verific:
|
share/verific:
|
||||||
$(P) rm -rf share/verific.new
|
$(P) rm -rf share/verific.new
|
||||||
$(Q) mkdir -p share/verific.new
|
$(Q) mkdir -p share/verific.new
|
||||||
ifneq ($(DISABLE_VERIFIC_VHDL),1)
|
ifeq ($(ENABLE_VERIFIC_VHDL),1)
|
||||||
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_1987/. share/verific.new/vhdl_vdbs_1987
|
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_1987/. share/verific.new/vhdl_vdbs_1987
|
||||||
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_1993/. share/verific.new/vhdl_vdbs_1993
|
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_1993/. share/verific.new/vhdl_vdbs_1993
|
||||||
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_2008/. share/verific.new/vhdl_vdbs_2008
|
$(Q) cp -r $(VERIFIC_DIR)/vhdl_packages/vdbs_2008/. share/verific.new/vhdl_vdbs_2008
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -80,6 +80,7 @@ USING_YOSYS_NAMESPACE
|
||||||
using namespace Verific;
|
using namespace Verific;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef VERIFIC_SYSTEMVERILOG_SUPPORT
|
||||||
PRIVATE_NAMESPACE_BEGIN
|
PRIVATE_NAMESPACE_BEGIN
|
||||||
|
|
||||||
// Non-deterministic FSM
|
// Non-deterministic FSM
|
||||||
|
@ -1878,5 +1879,8 @@ bool verific_is_sva_net(VerificImporter *importer, Verific::Net *net)
|
||||||
worker.importer = importer;
|
worker.importer = importer;
|
||||||
return worker.net_to_ast_driver(net) != nullptr;
|
return worker.net_to_ast_driver(net) != nullptr;
|
||||||
}
|
}
|
||||||
|
#else
|
||||||
|
YOSYS_NAMESPACE_BEGIN
|
||||||
|
pool<int> verific_sva_prims = {};
|
||||||
|
#endif
|
||||||
YOSYS_NAMESPACE_END
|
YOSYS_NAMESPACE_END
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue