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verilog: Squash a memory leak.

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That was added in ecc22f7fed
This commit is contained in:
Marcelina Kościelnicka 2021-06-14 16:28:10 +02:00
parent 438bcc68c0
commit 801ecc0e1d
4 changed files with 14 additions and 19 deletions
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12
frontends/verilog/verilog_frontend.cc
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@ -482,18 +482,18 @@ struct VerilogFrontend : public Frontend {
// make package typedefs available to parser
add_package_types(pkg_user_types, design->verilog_packages);
UserTypeMap *global_types_map = new UserTypeMap();
UserTypeMap global_types_map;
for (auto def : design->verilog_globals) {
if (def->type == AST::AST_TYPEDEF) {
(*global_types_map)[def->str] = def;
global_types_map[def->str] = def;
}
}
log_assert(user_type_stack.empty());
// use previous global typedefs as bottom level of user type stack
user_type_stack.push_back(global_types_map);
user_type_stack.push_back(std::move(global_types_map));
// add a new empty type map to allow overriding existing global definitions
user_type_stack.push_back(new UserTypeMap());
user_type_stack.push_back(UserTypeMap());
frontend_verilog_yyset_lineno(1);
frontend_verilog_yyrestart(NULL);
@ -519,10 +519,6 @@ struct VerilogFrontend : public Frontend {
// only the previous and new global type maps remain
log_assert(user_type_stack.size() == 2);
for (auto it : user_type_stack) {
// the global typedefs have to remain valid for future invocations, so just drop the map without deleting values
delete it;
}
user_type_stack.clear();
delete current_ast;