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renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()

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This commit is contained in:
Clifford Wolf 2015-10-24 22:56:40 +02:00
parent 6af8076967
commit 7f110e7018
8 changed files with 34 additions and 34 deletions
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8
passes/equiv/equiv_induct.cc
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@ -59,8 +59,8 @@ struct EquivInductWorker
cell_warn_cache.insert(cell);
}
if (cell->type == "$equiv") {
SigBit bit_a = sigmap(cell->getPort("\\A")).to_single_sigbit();
SigBit bit_b = sigmap(cell->getPort("\\B")).to_single_sigbit();
SigBit bit_a = sigmap(cell->getPort("\\A")).as_bit();
SigBit bit_b = sigmap(cell->getPort("\\B")).as_bit();
if (bit_a != bit_b) {
int ez_a = satgen.importSigBit(bit_a, step);
int ez_b = satgen.importSigBit(bit_b, step);
@ -137,8 +137,8 @@ struct EquivInductWorker
for (auto cell : workset)
{
SigBit bit_a = sigmap(cell->getPort("\\A")).to_single_sigbit();
SigBit bit_b = sigmap(cell->getPort("\\B")).to_single_sigbit();
SigBit bit_a = sigmap(cell->getPort("\\A")).as_bit();
SigBit bit_b = sigmap(cell->getPort("\\B")).as_bit();
log(" Trying to prove $equiv for %s:", log_signal(sigmap(cell->getPort("\\Y"))));