mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-29 23:43:16 +00:00
Code Activity

dfflibmap: Refactor to use dfflegalize internally.

Browse source
This commit is contained in:
Marcelina Kościelnicka 2020-07-02 18:22:43 +02:00
parent 68babb2ae4
commit 7ed9d18907
5 changed files with 212 additions and 210 deletions
Download patch file Download diff file Expand all files Collapse all files

22
tests/techmap/dfflibmap-sim.v Normal file
View file

@ -0,0 +1,22 @@
module dffn(input CLK, D, output reg Q, output QN);
always @(negedge CLK)
Q <= D;
assign QN = ~Q;
endmodule
module dffsr(input CLK, D, CLEAR, PRESET, output reg Q, output QN);
always @(posedge CLK, posedge CLEAR, posedge PRESET)
if (CLEAR)
Q <= 0;
else if (PRESET)
Q <= 1;
else
Q <= D;
assign QN = ~Q;
endmodule