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enable $bits() and $size() functions only when the SystemVerilog flag is enabled for read_verilog
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@ -1870,7 +1870,7 @@ skip_dynamic_range_lvalue_expansion:;
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goto apply_newNode;
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goto apply_newNode;
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}
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}
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if (str == "\\$size" || str == "\\$bits")
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if (VERILOG_FRONTEND::sv_mode && (str == "\\$size" || str == "\\$bits"))
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{
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{
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if (children.size() != 1)
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if (children.size() != 1)
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log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",
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log_error("System function %s got %d arguments, expected 1 at %s:%d.\n",
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