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Fixed techmap_wrap for techmap_celltype

This commit is contained in:
Clifford Wolf 2014-09-14 15:34:36 +02:00
parent 923bbbeaf0
commit 7e156a5419

View file

@ -363,6 +363,9 @@ struct TechmapWorker
for (auto &c : cell->parameters) for (auto &c : cell->parameters)
m_name += stringf(":%s=%s", log_id(c.first), log_signal(c.second)); m_name += stringf(":%s=%s", log_id(c.first), log_signal(c.second));
if (extmapper_name == "wrap")
m_name += ":" + sha1(tpl->attributes.at("\\techmap_wrap").decode_string());
RTLIL::Design *extmapper_design = extern_mode && !in_recursion ? design : tpl->design; RTLIL::Design *extmapper_design = extern_mode && !in_recursion ? design : tpl->design;
RTLIL::Module *extmapper_module = extmapper_design->module(m_name); RTLIL::Module *extmapper_module = extmapper_design->module(m_name);
@ -444,7 +447,6 @@ struct TechmapWorker
break; break;
} }
use_wrapper_tpl:
for (auto conn : cell->connections()) { for (auto conn : cell->connections()) {
if (conn.first.substr(0, 1) == "$") if (conn.first.substr(0, 1) == "$")
continue; continue;
@ -511,16 +513,21 @@ struct TechmapWorker
} }
} }
std::pair<RTLIL::IdString, std::map<RTLIL::IdString, RTLIL::Const>> key(tpl_name, parameters); if (0) {
if (techmap_cache.count(key) > 0) { use_wrapper_tpl:;
tpl = techmap_cache[key]; // do not register techmap_wrap modules with techmap_cache
} else { } else {
if (cell->parameters.size() != 0) { std::pair<RTLIL::IdString, std::map<RTLIL::IdString, RTLIL::Const>> key(tpl_name, parameters);
derived_name = tpl->derive(map, parameters); if (techmap_cache.count(key) > 0) {
tpl = map->module(derived_name); tpl = techmap_cache[key];
log_continue = true; } else {
if (cell->parameters.size() != 0) {
derived_name = tpl->derive(map, parameters);
tpl = map->module(derived_name);
log_continue = true;
}
techmap_cache[key] = tpl;
} }
techmap_cache[key] = tpl;
} }
if (flatten_mode) { if (flatten_mode) {