mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-19 21:55:48 +00:00
Code Activity

Update aigmap to go a lot faster using aig template cache and uniquify cache

Browse source
This commit is contained in:
Akash Levy 2026-03-01 22:35:06 -08:00
parent b03f73653f
commit 7d96a7f73c
3 changed files with 43 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

2
kernel/rtlil.cc
View file

@ -3151,7 +3151,7 @@ void RTLIL::Module::swap_names(RTLIL::Cell *c1, RTLIL::Cell *c2)
RTLIL::IdString RTLIL::Module::uniquify(RTLIL::IdString name)
{
int index = 0;
int &index = uniquify_cache_[name];
return uniquify(name, index);
}

1
kernel/rtlil.h
View file

@ -2168,6 +2168,7 @@ public:
void swap_names(RTLIL::Wire *w1, RTLIL::Wire *w2);
void swap_names(RTLIL::Cell *c1, RTLIL::Cell *c2);
dict<RTLIL::IdString, int> uniquify_cache_;
RTLIL::IdString uniquify(RTLIL::IdString name);
RTLIL::IdString uniquify(RTLIL::IdString name, int &index);