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Added bool constructors to SigBit and SigSpec

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This commit is contained in:
Clifford Wolf 2014-12-08 15:08:02 +01:00
parent bca2442c67
commit 7d6e586df8
2 changed files with 12 additions and 0 deletions
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10
kernel/rtlil.cc
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@ -2188,6 +2188,16 @@ RTLIL::SigSpec::SigSpec(std::set<RTLIL::SigBit> bits)
check();
}
RTLIL::SigSpec::SigSpec(bool bit)
{
cover("kernel.rtlil.sigspec.init.bool");
width_ = 0;
hash_ = 0;
append_bit(bit);
check();
}
void RTLIL::SigSpec::pack() const
{
RTLIL::SigSpec *that = (RTLIL::SigSpec*)this;

2
kernel/rtlil.h
View file

@ -899,6 +899,7 @@ struct RTLIL::SigBit
SigBit() : wire(NULL), data(RTLIL::State::S0) { }
SigBit(RTLIL::State bit) : wire(NULL), data(bit) { }
SigBit(bool bit) : wire(NULL), data(bit ? RTLIL::S1 : RTLIL::S0) { }
SigBit(RTLIL::Wire *wire) : wire(wire), offset(0) { log_assert(wire && wire->width == 1); }
SigBit(RTLIL::Wire *wire, int offset) : wire(wire), offset(offset) { log_assert(wire != nullptr); }
SigBit(const RTLIL::SigChunk &chunk) : wire(chunk.wire) { log_assert(chunk.width == 1); if (wire) offset = chunk.offset; else data = chunk.data[0]; }
@ -982,6 +983,7 @@ public:
SigSpec(std::vector<RTLIL::SigChunk> chunks);
SigSpec(std::vector<RTLIL::SigBit> bits);
SigSpec(std::set<RTLIL::SigBit> bits);
SigSpec(bool bit);
SigSpec(RTLIL::SigSpec &&other) {
width_ = other.width_;