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Make the call to compare_signals() easier to read.
The negation here is confusing. The intent of the code is "if `s1` is preferred over `s2` as the canonical `SigBit` for this signal, make `s1` the canonical `SigBit` in `assign_map`", so write the code that way instead of "if `s2` is not preferred over `s1` ...". This doesn't change any behavior now that `compare_signals()` is a total order, i.e. `s1` is preferred over `s2`, `s2` is preferred over `s1`, or `s1` and `s2` are equal. Now, when `s1` and `s2` are equal, we don't call `assign_map.add(s1)`, but that's already a noop in that case.
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1 changed files with 1 additions and 1 deletions
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@ -346,7 +346,7 @@ bool rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
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RTLIL::Wire *wire = it.second;
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for (int i = 0; i < wire->width; i++) {
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RTLIL::SigBit s1 = RTLIL::SigBit(wire, i), s2 = assign_map(s1);
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if (!compare_signals(s1, s2, register_signals, connected_signals, direct_wires))
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if (compare_signals(s2, s1, register_signals, connected_signals, direct_wires))
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assign_map.add(s1);
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}
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}
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