From 7ce938a0713fcbb679e4ca537f8d4be09607521e Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Mon, 3 Feb 2025 18:35:46 +0100
Subject: [PATCH] fixup! abstract: -state MVP

---
 passes/cmds/abstract.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/passes/cmds/abstract.cc b/passes/cmds/abstract.cc
index 2bb9a6839..e336fad47 100644
--- a/passes/cmds/abstract.cc
+++ b/passes/cmds/abstract.cc
@@ -20,8 +20,7 @@ bool abstract_state(Module* mod, Cell* cell, Wire* enable, bool enable_pol) {
 	auto anyseq = mod->Anyseq(NEW_ID, ff.width);
 
 	if (ff.has_aload) {
-		// aload := enable ? anyseq : aload
-		// ff.pol_aload = enable_pol;
+		// ad := enable ? anyseq : ad
 		Wire* abstracted_ad = mod->addWire(NEW_ID, ff.sig_ad.size());
 		SigSpec mux_a, mux_b;
 		if (enable_pol) {
@@ -38,6 +37,7 @@ bool abstract_state(Module* mod, Cell* cell, Wire* enable, bool enable_pol) {
 			abstracted_ad);
 		ff.sig_ad = abstracted_ad;
 	}
+	// d := enable ? anyseq : d
 	Wire* abstracted_d = mod->addWire(NEW_ID, ff.sig_d.size());
 	SigSpec mux_a, mux_b;
 	if (enable_pol) {