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abc9 -- multiple connections for inouts

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This commit is contained in:
Eddie Hung 2019-02-26 12:18:28 -08:00
parent 8e883d92ed
commit 7cac3b1c8b
1 changed files with 2 additions and 1 deletions
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3
passes/techmap/abc9.cc
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@ -898,13 +898,14 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
conn.first = remap_wire; conn.first = remap_wire;
conn.second = signal; conn.second = signal;
in_wires++; in_wires++;
module->connect(conn);
} }
if (w->port_output) { if (w->port_output) {
conn.first = signal; conn.first = signal;
conn.second = remap_wire; conn.second = remap_wire;
out_wires++; out_wires++;
module->connect(conn);
} }
module->connect(conn);
} }
//log("ABC RESULTS: internal signals: %8d\n", int(signal_list.size()) - in_wires - out_wires); //log("ABC RESULTS: internal signals: %8d\n", int(signal_list.size()) - in_wires - out_wires);