3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00

Fix for all zero mask

This commit is contained in:
eddiehung 2015-05-03 12:53:09 +01:00
parent 079c1205fe
commit 7c62318239
2 changed files with 16 additions and 1 deletions

View file

@ -234,13 +234,24 @@ struct BlifDumper
f << stringf(" %s", cstr(output));
f << stringf("\n");
RTLIL::SigSpec mask = cell->parameters.at("\\LUT");
bool one = false;
for (int i = 0; i < (1 << width); i++)
if (mask[i] == RTLIL::S1) {
for (int j = width-1; j >= 0; j--) {
f << ((i>>j)&1 ? '1' : '0');
}
f << " 1\n";
one = true;
}
/* For some reason, sometimes we get LUTs with
* an all zero mask, which won't give any
* .names entries, so write one entry with
* all don't cares */
if (!one) {
for (int j = width-1; j >= 0; j--)
f << '-';
f << " 0\n";
}
continue;
}