mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-23 09:05:32 +00:00
Add memory_libmap pass.
This commit is contained in:
parent
9450f308f0
commit
7c5dba8b77
6 changed files with 3884 additions and 0 deletions
|
@ -29,10 +29,12 @@ X(A_SIGNED)
|
|||
X(A_WIDTH)
|
||||
X(B)
|
||||
X(BI)
|
||||
X(BITS_USED)
|
||||
X(blackbox)
|
||||
X(B_SIGNED)
|
||||
X(bugpoint_keep)
|
||||
X(B_WIDTH)
|
||||
X(BYTE)
|
||||
X(C)
|
||||
X(cells_not_processed)
|
||||
X(CE_OVER_SRST)
|
||||
|
@ -116,6 +118,8 @@ X(keep_hierarchy)
|
|||
X(L)
|
||||
X(lib_whitebox)
|
||||
X(localparam)
|
||||
X(logic_block)
|
||||
X(lram)
|
||||
X(LUT)
|
||||
X(lut_keep)
|
||||
X(M)
|
||||
|
@ -145,6 +149,9 @@ X(PRIORITY_MASK)
|
|||
X(Q)
|
||||
X(qwp_position)
|
||||
X(R)
|
||||
X(ram_block)
|
||||
X(ram_style)
|
||||
X(ramstyle)
|
||||
X(RD_ADDR)
|
||||
X(RD_ARST)
|
||||
X(RD_ARST_VALUE)
|
||||
|
@ -164,6 +171,9 @@ X(RD_TRANSPARENT)
|
|||
X(RD_WIDE_CONTINUATION)
|
||||
X(reg)
|
||||
X(reprocess_after)
|
||||
X(rom_block)
|
||||
X(rom_style)
|
||||
X(romstyle)
|
||||
X(S)
|
||||
X(SET)
|
||||
X(SET_POLARITY)
|
||||
|
@ -186,6 +196,8 @@ X(STATE_NUM_LOG2)
|
|||
X(STATE_RST)
|
||||
X(STATE_TABLE)
|
||||
X(submod)
|
||||
X(syn_ramstyle)
|
||||
X(syn_romstyle)
|
||||
X(S_WIDTH)
|
||||
X(T)
|
||||
X(TABLE)
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue