From 7c1cb53c8516b34b6ecdd8c97b8611527b0bb088 Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Wed, 5 Mar 2025 06:09:40 -0800 Subject: [PATCH] Packed muxes have src attr for each constituent mux --- passes/opt/muxpack.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/passes/opt/muxpack.cc b/passes/opt/muxpack.cc index 5b5b65a30..fe60d5404 100644 --- a/passes/opt/muxpack.cc +++ b/passes/opt/muxpack.cc @@ -288,6 +288,7 @@ struct MuxpackWorker s_sig.append(module->LogicNot(NEW_ID2_SUFFIX("sel"), cursor_cell->getPort(ID::S), false, cell->get_src_attribute())); // SILIMATE: Improve the naming } remove_cells.insert(cursor_cell); + first_cell->add_strpool_attribute(ID::src, cursor_cell->get_strpool_attribute(ID::src)); // SILIMATE: Improve src attribution } if (make_excl) { @@ -328,7 +329,7 @@ struct MuxpackWorker Wire *and_y = module->addWire(NEW_ID2_SUFFIX("and_y"), 1); module->addAnd(NEW_ID2_SUFFIX("sel"), sigbit, prevSigNot, and_y, false, last_cell->get_src_attribute()); decodedSelect.append(and_y); - Wire *not_y = module->addWire(NEW_ID, 1); + Wire *not_y = module->addWire(NEW_ID2_SUFFIX("not_y"), 1); module->addNot(NEW_ID2_SUFFIX("not"), sigbit, not_y, false, last_cell->get_src_attribute()); prevSigAnd = prevSigNot; prevSigNot = not_y;