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Merge pull request #3294 from YosysHQ/micko/verific_merge_past_ff
Ignore merging past ffs that we are not properly merging
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@ -987,6 +987,7 @@ void VerificImporter::merge_past_ffs(pool<RTLIL::Cell*> &candidates)
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for (auto cell : candidates)
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{
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if (cell->type != ID($dff)) continue;
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SigBit clock = cell->getPort(ID::CLK);
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bool clock_pol = cell->getParam(ID::CLK_POLARITY).as_bool();
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database[make_pair(clock, int(clock_pol))].insert(cell);
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