mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-27 02:45:52 +00:00
Code Activity

Merge pull request #2617 from RobertBaruch/doc

Browse source 
RTLIL Documentation: switch in process is optional
This commit is contained in:
whitequark 2021-03-01 08:10:32 -08:00 • committed by GitHub
commit 7b47dd0f88
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
manual/CHAPTER_TextRtlil.tex
View file

@ -241,7 +241,7 @@ See Sec.~\ref{sec:rtlil_process} for an overview of processes.
<proc-stmt> ::= "process" <id> <eol>
<process-body> ::= <assign-stmt>$*$ <switch> <assign-stmt>$*$ <sync>$*$
<process-body> ::= <assign-stmt>$*$ <switch>$?$ <assign-stmt>$*$ <sync>$*$
<assign-stmt> ::= "assign" <dest-sigspec> <src-sigspec> <eol>