mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 09:05:32 +00:00
Code Activity

opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.

Browse source 
Fixes #2221.
This commit is contained in:
Marcelina Kościelnicka 2020-07-05 00:55:38 +02:00
parent b004f09018
commit 7afcb72c98
2 changed files with 24 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

8
passes/opt/opt_expr.cc
View file

@ -1596,6 +1596,14 @@ skip_identity:
log_debug("Removing low %d A and %d B bits from cell `%s' in module `%s'.\n",
a_zeros, b_zeros, cell->name.c_str(), module->name.c_str());
if (y_zeros >= GetSize(sig_y)) {
module->connect(sig_y, RTLIL::SigSpec(0, GetSize(sig_y)));
module->remove(cell);
did_something = true;
goto next_cell;
}
if (a_zeros) {
cell->setPort(ID::A, sig_a.extract_end(a_zeros));
cell->parameters[ID::A_WIDTH] = GetSize(sig_a) - a_zeros;