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Added hierarchy -purge_lib option

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This commit is contained in:
Clifford Wolf 2014-02-04 16:50:13 +01:00
parent 7a66b38c3e
commit 7a5f378bae
1 changed files with 14 additions and 3 deletions
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17
passes/hierarchy/hierarchy.cc
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@ -210,7 +210,7 @@ static void hierarchy_worker(RTLIL::Design *design, std::set<RTLIL::Module*> &us
} }
} }
static void hierarchy(RTLIL::Design *design, RTLIL::Module *top) static void hierarchy(RTLIL::Design *design, RTLIL::Module *top, bool purge_lib)
{ {
std::set<RTLIL::Module*> used; std::set<RTLIL::Module*> used;
hierarchy_worker(design, used, top, 0); hierarchy_worker(design, used, top, 0);
@ -221,6 +221,8 @@ static void hierarchy(RTLIL::Design *design, RTLIL::Module *top)
del_modules.push_back(it.second); del_modules.push_back(it.second);
for (auto mod : del_modules) { for (auto mod : del_modules) {
if (!purge_lib && mod->get_bool_attribute("\\blackbox"))
continue;
log("Removing unused module `%s'.\n", mod->name.c_str()); log("Removing unused module `%s'.\n", mod->name.c_str());
design->modules.erase(mod->name); design->modules.erase(mod->name);
delete mod; delete mod;
@ -247,6 +249,10 @@ struct HierarchyPass : public Pass {
log(" also check the design hierarchy. this generates an error when\n"); log(" also check the design hierarchy. this generates an error when\n");
log(" an unknown module is used as cell type.\n"); log(" an unknown module is used as cell type.\n");
log("\n"); log("\n");
log(" -purge_lib\n");
log(" by default the hierarchy command will not remove library (blackbox)\n");
log(" module. use this options to also remove unused blackbox modules.\n");
log("\n");
log(" -libdir <directory>\n"); log(" -libdir <directory>\n");
log(" search for files named <module_name>.v in the specified directory\n"); log(" search for files named <module_name>.v in the specified directory\n");
log(" for unkown modules and automatically run read_verilog for each\n"); log(" for unkown modules and automatically run read_verilog for each\n");
@ -286,6 +292,7 @@ struct HierarchyPass : public Pass {
log_header("Executing HIERARCHY pass (managing design hierarchy).\n"); log_header("Executing HIERARCHY pass (managing design hierarchy).\n");
bool flag_check = false; bool flag_check = false;
bool purge_lib = false;
RTLIL::Module *top_mod = NULL; RTLIL::Module *top_mod = NULL;
std::vector<std::string> libdirs; std::vector<std::string> libdirs;
@ -340,6 +347,10 @@ struct HierarchyPass : public Pass {
flag_check = true; flag_check = true;
continue; continue;
} }
if (args[argidx] == "-purge_lib") {
purge_lib = true;
continue;
}
if (args[argidx] == "-keep_positionals") { if (args[argidx] == "-keep_positionals") {
keep_positionals = true; keep_positionals = true;
continue; continue;
@ -376,7 +387,7 @@ struct HierarchyPass : public Pass {
top_mod = mod_it.second; top_mod = mod_it.second;
if (top_mod != NULL) if (top_mod != NULL)
hierarchy(design, top_mod); hierarchy(design, top_mod, purge_lib);
bool did_something = true; bool did_something = true;
bool did_something_once = false; bool did_something_once = false;
@ -398,7 +409,7 @@ struct HierarchyPass : public Pass {
if (top_mod != NULL && did_something_once) { if (top_mod != NULL && did_something_once) {
log_header("Re-running hierarchy analysis..\n"); log_header("Re-running hierarchy analysis..\n");
hierarchy(design, top_mod); hierarchy(design, top_mod, purge_lib);
} }
if (top_mod != NULL) { if (top_mod != NULL) {