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https://github.com/YosysHQ/yosys
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yosys-smtbmc: improved --dump-vlogtb handling of memories
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parent
cdd0b85e47
commit
7a33b9892a
3 changed files with 30 additions and 8 deletions
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@ -128,7 +128,7 @@ class smtio:
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self.modinfo[self.curmod].wsize[fields[2]] = int(fields[3])
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if fields[1] == "yosys-smt2-memory":
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self.modinfo[self.curmod].memories[fields[2]] = (int(fields[3]), int(fields[4]))
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self.modinfo[self.curmod].memories[fields[2]] = (int(fields[3]), int(fields[4]), int(fields[5]))
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if fields[1] == "yosys-smt2-wire":
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self.modinfo[self.curmod].wires.add(fields[2])
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@ -309,6 +309,9 @@ class smtio:
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return "".join(digits)
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assert False
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def bv2int(self, v):
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return int(self.bv2bin(v), 2)
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def get(self, expr):
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self.write("(get-value (%s))" % (expr))
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return self.parse(self.read())[0][1]
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@ -342,11 +345,13 @@ class smtio:
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assert net_path[-1] in self.modinfo[mod].wsize
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return self.modinfo[mod].wsize[net_path[-1]]
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def mem_expr(self, mod, base, path):
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def mem_expr(self, mod, base, path, portidx=None, infomode=False):
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if len(path) == 1:
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assert mod in self.modinfo
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assert path[0] in self.modinfo[mod].memories
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return "(|%s_m %s| %s)" % (mod, path[0], base), self.modinfo[mod].memories[path[0]][0], self.modinfo[mod].memories[path[0]][1]
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if infomode:
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return self.modinfo[mod].memories[path[0]]
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return "(|%s_m%s %s| %s)" % (mod, "" if portidx is None else ":%d" % portidx, path[0], base)
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assert mod in self.modinfo
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assert path[0] in self.modinfo[mod].cells
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@ -355,6 +360,9 @@ class smtio:
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nextbase = "(|%s_h %s| %s)" % (mod, path[0], base)
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return self.mem_expr(nextmod, nextbase, path[1:])
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def mem_info(self, mod, base, path):
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return self.mem_expr(mod, base, path, infomode=True)
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def get_net(self, mod_name, net_path, state_name):
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return self.get(self.net_expr(mod_name, state_name, net_path))
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