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Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
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@ -42,7 +42,7 @@ endmodule
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// Box to emulate async behaviour of FDP*
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(* abc9_box_id = 1001, lib_whitebox *)
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module \$__ABC9_ASYNC1 (input A, S, output Y);
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assign Y = S ? 1'b0 : A;
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assign Y = S ? 1'b1 : A;
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endmodule
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// Box to emulate comb/seq behaviour of RAM{32,64} and SRL{16,32}
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