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kernel: TimingInfo to clamp -ve setup/edge-sensitive delays to zero

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This commit is contained in:
Eddie Hung 2020-04-16 10:21:08 -07:00
parent 4cec21b93e
commit 7812a2959b
1 changed files with 6 additions and 10 deletions
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16
kernel/timinginfo.h
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@ -128,11 +128,9 @@ struct TimingInfo
int rise_max = cell->getParam(ID::T_RISE_MAX).as_int(); int rise_max = cell->getParam(ID::T_RISE_MAX).as_int();
int fall_max = cell->getParam(ID::T_FALL_MAX).as_int(); int fall_max = cell->getParam(ID::T_FALL_MAX).as_int();
int max = std::max(rise_max,fall_max); int max = std::max(rise_max,fall_max);
if (max < 0) if (max < 0) {
log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell)); log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
if (max <= 0) { max = 0;
log_debug("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX <= 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
continue;
} }
for (const auto &d : dst) { for (const auto &d : dst) {
auto &v = t.arrival[NameBit(d)]; auto &v = t.arrival[NameBit(d)];
@ -152,11 +150,9 @@ struct TimingInfo
if (!c.wire->port_input) if (!c.wire->port_input)
log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(dst)); log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(dst));
int max = cell->getParam(ID::T_LIMIT_MAX).as_int(); int max = cell->getParam(ID::T_LIMIT_MAX).as_int();
if (max < 0) if (max < 0) {
log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell)); log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
if (max <= 0) { max = 0;
log_debug("Module '%s' contains specify cell '%s' with T_LIMIT_MAX <= 0 which is currently unsupported. Ignoring.\n", log_id(module), log_id(cell));
continue;
} }
for (const auto &s : src) { for (const auto &s : src) {
auto &v = t.required[NameBit(s)]; auto &v = t.required[NameBit(s)];