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Retry on fixing TODOs
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parent
52583ecff8
commit
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@ -100,14 +100,10 @@ code sigA sigB sigC sigD sigM clock
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sigM.append(P[i]);
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sigM.append(P[i]);
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}
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}
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log_assert(nusers(P.extract_end(i)) <= 1);
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log_assert(nusers(P.extract_end(i)) <= 1);
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log_assert(!sigM.empty());
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}
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}
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else
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else
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sigM = P;
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sigM = P;
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// TODO: Check if necessary
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// This sigM could have no users if downstream $add
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// is narrower than $mul result, for example
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if (sigM.empty())
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reject;
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clock = port(dsp, \CLK, SigBit());
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clock = port(dsp, \CLK, SigBit());
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endcode
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endcode
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@ -160,12 +156,9 @@ match preAdd
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endmatch
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endmatch
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code sigA sigD
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code sigA sigD
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// TODO: Check if this is necessary?
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if (preAdd) {
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if (preAdd) {
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sigA = port(preAdd, \A);
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sigA = port(preAdd, \A);
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sigD = port(preAdd, \B);
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sigD = port(preAdd, \B);
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if (GetSize(sigA) < GetSize(sigD))
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std::swap(sigA, sigD);
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}
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}
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endcode
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endcode
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@ -79,11 +79,6 @@ endcode
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// (attached to at most two $mux cells that implement clock-enable or
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// (attached to at most two $mux cells that implement clock-enable or
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// reset functionality, using the in_dffe subpattern)
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// reset functionality, using the in_dffe subpattern)
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code argQ ffC ffCcemux ffCrstmux ffCcepol ffCrstpol sigC clock
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code argQ ffC ffCcemux ffCrstmux ffCcepol ffCrstpol sigC clock
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// TODO: Any downside to allowing this?
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// If this DSP implements an accumulator, do not attempt to match
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if (sigC == sigP)
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reject;
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argQ = sigC;
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argQ = sigC;
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subpattern(in_dffe);
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subpattern(in_dffe);
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if (dff) {
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if (dff) {
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