mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-22 19:17:55 +00:00
Code Activity

initial import

Browse source
This commit is contained in:
Clifford Wolf 2013-01-05 11:13:26 +01:00
commit 7764d0ba1d
481 changed files with 54634 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

13
tests/hana/test_simulation_always_27_test.v Normal file
View file

@ -0,0 +1,13 @@
module FlipFlop(clock, cs, ns);
input clock;
input cs;
output reg ns;
reg temp;
always @(posedge clock)
begin
temp <= cs;
ns <= temp;
end
endmodule