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initial import

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Clifford Wolf 2013-01-05 11:13:26 +01:00
commit 7764d0ba1d
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tests/hana/test_intermout_always_ff_5_test.v Normal file
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module FlipFlop(clock, cs, ns);
input clock;
input [3:0] cs;
output reg [3:0] ns;
reg [3:0] temp;
always @(posedge clock)
begin
temp = cs;
ns = temp;
end
endmodule