mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-24 13:18:56 +00:00
Code Activity

Really get rid of 'opt_expr -fine' by being explicit

Browse source
This commit is contained in:
Eddie Hung 2019-09-10 14:26:12 -07:00
parent c460d10e60
commit 76eedee089
2 changed files with 33 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

39
techlibs/common/mul2dsp.v
View file

@ -148,8 +148,17 @@ module _80_mul (A, B, Y);
// reduction' approach also exists...
if (i == 0)
assign partial_sum[i] = partial[i];
else
assign partial_sum[i] = (partial[i] << i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[i-1];
else begin
// Rewrite the following statement explicitly in order
// to save on a call to 'opt_expr -fine' which would
// optimise away the '<<' op and trim size of adder
//assign partial_sum[i] = (partial[i] << i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[i-1];
wire [Y_WIDTH-1:0] shifted_sum = {partial[i], {i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom){1'b0}}};
assign partial_sum[i] = {
partial_sum[i-1][i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0],
shifted_sum[Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] + partial_sum[i-1][Y_WIDTH-1:i*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)]
};
end
end
\$__mul #(
@ -163,7 +172,12 @@ module _80_mul (A, B, Y);
.B(B),
.Y(last_partial)
);
assign partial_sum[n] = (last_partial << n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];
//assign partial_sum[n] = (last_partial << n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];
wire [Y_WIDTH-1:0] shifted_sum = {last_partial, {n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom){1'b0}}};
assign partial_sum[n] = {
partial_sum[n-1][n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)-1:0],
shifted_sum[Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)] + partial_sum[n-1][Y_WIDTH-1:n*(`DSP_A_MAXWIDTH_PARTIAL-sign_headroom)]
};
assign Y = partial_sum[n];
end
else if (B_WIDTH > `DSP_B_MAXWIDTH) begin
@ -199,8 +213,16 @@ module _80_mul (A, B, Y);
// reduction' approach also exists...
if (i == 0)
assign partial_sum[i] = partial[i];
else
assign partial_sum[i] = (partial[i] << i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[i-1];
else begin
// Rewrite the following statement explicitly in order
// to save on a call to 'opt_expr -fine' which would
// optimise away the '<<' op and trim size of adder
wire [Y_WIDTH-1:0] shifted_sum = {partial[i], {i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom){1'b0}}};
assign partial_sum[i] = {
partial_sum[i-1][i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0],
shifted_sum[Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] + partial_sum[i-1][Y_WIDTH-1:i*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)]
};
end
end
\$__mul #(
@ -214,7 +236,12 @@ module _80_mul (A, B, Y);
.B(B[B_WIDTH-1 -: last_B_WIDTH]),
.Y(last_partial)
);
assign partial_sum[n] = (last_partial << n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];
//assign partial_sum[n] = (last_partial << n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)) + partial_sum[n-1];
wire [Y_WIDTH-1:0] shifted_sum = {last_partial, {n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom){1'b0}}};
assign partial_sum[n] = {
partial_sum[n-1][n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)-1:0],
shifted_sum[Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)] + partial_sum[n-1][Y_WIDTH-1:n*(`DSP_B_MAXWIDTH_PARTIAL-sign_headroom)]
};
assign Y = partial_sum[n];
end
else begin