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Fix: handle VCD variable references with and without whitespace
Co-authored-by: Miodrag Milanović <mmicko@gmail.com> Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
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5 changed files with 88 additions and 1 deletions
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tests/sim/vcd_var_reference_whitespace.ys
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tests/sim/vcd_var_reference_whitespace.ys
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@ -0,0 +1,3 @@
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read_rtlil vector_assign.il
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sim -r var_reference_without_whitespace.vcd -scope tb.uut
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sim -r var_reference_with_whitespace.vcd -scope tb.uut
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