mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-21 21:33:40 +00:00
Code Activity

$not now passes test_cell!

Browse source
This commit is contained in:
Emil J. Tywoniak 2024-06-19 18:55:40 +02:00
parent 81f783bf62
commit 76102f0bc5
7 changed files with 108 additions and 33 deletions
Download patch file Download diff file Expand all files Collapse all files

7
passes/techmap/alumacc.cc
View file

@ -145,7 +145,9 @@ struct AlumaccWorker
Macc::port_t new_port;
n->cell = cell;
log("%s\n", log_signal(cell->getPort(ID::Y)));
n->y = sigmap(cell->getPort(ID::Y));
log("%s\n", log_signal(n->y));
n->users = 0;
for (auto bit : n->y)
@ -181,6 +183,7 @@ struct AlumaccWorker
n->macc.ports.push_back(new_port);
}
log("%s\n", log_signal(n->y));
log_assert(sig_macc.count(n->y) == 0);
sig_macc[n->y] = n;
}
@ -237,8 +240,12 @@ struct AlumaccWorker
for (int i = 0; i < GetSize(n->macc.ports); i++)
{
log("ports: size %d\n", n->macc.ports.size());
auto &port = n->macc.ports[i];
log("ports 2: size %d\n", port.in_b.size());
log("uuh: count %d\n", sig_macc.count(port.in_a));
log("%s\n", log_signal(port.in_a));
if (GetSize(port.in_b) > 0 || sig_macc.count(port.in_a) == 0)
continue;

1
passes/techmap/techmap.cc
View file

@ -563,6 +563,7 @@ struct TechmapWorker
if (extmapper_name == "wrap") {
std::string cmd_string = tpl->attributes.at(ID::techmap_wrap).decode_string();
log("Running \"%s\" on wrapper %s.\n", cmd_string.c_str(), log_id(extmapper_module));
log_module(extmapper_module);
mkdebug.on();
Pass::call_on_module(extmapper_design, extmapper_module, cmd_string);
log_continue = true;