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tests: exclude signorm marker cells from two more cell-count assertions

This commit is contained in:
Emil J. Tywoniak 2026-07-21 16:52:45 +02:00
parent 9e2c65388f
commit 75fc5753a4
2 changed files with 2 additions and 2 deletions

View file

@ -24,7 +24,7 @@ EOT
read_verilog -icells -lib +/ice40/abc9_model.v +/ice40/cells_sim.v
equiv_opt -assert -map +/ice40/abc9_model.v -map +/ice40/cells_sim.v ice40_opt
design -load postopt
select -assert-count 1 t:*
select -assert-count 1 t:* t:$*_port %d t:$public %d
select -assert-count 1 t:$lut
# https://github.com/YosysHQ/yosys/issues/1543

View file

@ -92,7 +92,7 @@ prep -nokeepdc
equiv_opt -assert peepopt
design -load postopt
clean
select -assert-count 0 t:*
select -assert-count 0 t:* t:$*_port %d t:$public %d
####################