From 583771ef5b8fd847c012c60f165ed9e1b8aa2db3 Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 1/8] cutpoint: Add -blackbox option Replace the contents of all blackboxes in the design with a formal cut point. Includes test script. --- passes/sat/cutpoint.cc | 27 ++++++++++++++++++++++-- tests/various/cutpoint_blackbox.ys | 33 ++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 2 deletions(-) create mode 100644 tests/various/cutpoint_blackbox.ys diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index 263a3a4c8..171ae060a 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -37,10 +37,15 @@ struct CutpointPass : public Pass { log(" set cutpoint nets to undef (x). the default behavior is to create\n"); log(" an $anyseq cell and drive the cutpoint net from that\n"); log("\n"); + log(" cutpoint -blackbox [options]\n"); + log("\n"); + log("Replace the contents of all blackboxes in the design with a formal cut point.\n"); + log("\n"); } void execute(std::vector args, RTLIL::Design *design) override { - bool flag_undef = false; + bool flag_undef = false; + bool flag_blackbox = false; log_header(design, "Executing CUTPOINT pass.\n"); @@ -51,11 +56,25 @@ struct CutpointPass : public Pass { flag_undef = true; continue; } + if (args[argidx] == "-blackbox") { + flag_blackbox = true; + continue; + } break; } extra_args(args, argidx, design); - for (auto module : design->selected_modules()) + if (flag_blackbox) { + if (!design->full_selection()) + log_cmd_error("This command only operates on fully selected designs!\n"); + RTLIL::Selection module_boxes(false); + for (auto module : design->modules()) + if (module->get_blackbox_attribute()) + module_boxes.select(module); + design->selection_stack.push_back(module_boxes); + } + + for (auto module : design->all_selected_modules()) { if (module->is_selected_whole()) { log("Making all outputs of module %s cut points, removing module contents.\n", log_id(module)); @@ -68,6 +87,10 @@ struct CutpointPass : public Pass { output_wires.push_back(wire); for (auto wire : output_wires) module->connect(wire, flag_undef ? Const(State::Sx, GetSize(wire)) : module->Anyseq(NEW_ID, GetSize(wire))); + if (module->get_blackbox_attribute()) { + module->set_bool_attribute(ID::blackbox, false); + module->set_bool_attribute(ID::whitebox, false); + } continue; } diff --git a/tests/various/cutpoint_blackbox.ys b/tests/various/cutpoint_blackbox.ys new file mode 100644 index 000000000..78ee46db6 --- /dev/null +++ b/tests/various/cutpoint_blackbox.ys @@ -0,0 +1,33 @@ +read_verilog -specify << EOT +module top(input a, b, output o); + wire c, d; + bb bb1 (.a (a), .b (b), .o (c)); + wb wb1 (.a (a), .b (b), .o (d)); + some_mod some_inst (.a (c), .b (d), .o (o)); +endmodule + +(* blackbox *) +module bb(input a, b, output o); +assign o = a | b; +specify + (a => o) = 1; +endspecify +endmodule + +(* whitebox *) +module wb(input a, b, output o); +assign o = a ^ b; +endmodule + +module some_mod(input a, b, output o); +assign o = a & b; +endmodule +EOT + +select top + +select -assert-count 0 t:$anyseq +select -assert-count 2 =t:?b +cutpoint -blackbox =* +select -assert-count 2 t:$anyseq +select -assert-count 2 t:?b From ca57df89277edb4394dd140cabb5937bc2dfada4 Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 2/8] cutpoint: Add $scopeinfo cell Also adds "blackbox" as a valid TYPE. --- kernel/rtlil.cc | 2 +- passes/sat/cutpoint.cc | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index f835dd269..dd78b202d 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -2140,7 +2140,7 @@ namespace { param(ID::TYPE); check_expected(); std::string scope_type = cell->getParam(ID::TYPE).decode_string(); - if (scope_type != "module" && scope_type != "struct") + if (scope_type != "module" && scope_type != "struct" && scope_type != "blackbox") error(__LINE__); return; } diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index 171ae060a..573dfbd0a 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -90,6 +90,8 @@ struct CutpointPass : public Pass { if (module->get_blackbox_attribute()) { module->set_bool_attribute(ID::blackbox, false); module->set_bool_attribute(ID::whitebox, false); + auto scopeinfo = module->addCell(NEW_ID, ID($scopeinfo)); + scopeinfo->setParam(ID::TYPE, RTLIL::Const("blackbox")); } continue; } From cf44a9124fdf4c674e8914dafbb31942fec371ac Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 3/8] cutpoint: Test -blackbox with parameter Modify `cutpoint_blackbox.ys` to check that parameters on blackbox modules are maintained after the cutpoint. Also adjusts the test to check that each instance gets the `$anyseq` cell. --- tests/various/cutpoint_blackbox.ys | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/tests/various/cutpoint_blackbox.ys b/tests/various/cutpoint_blackbox.ys index 78ee46db6..ee7a18c6a 100644 --- a/tests/various/cutpoint_blackbox.ys +++ b/tests/various/cutpoint_blackbox.ys @@ -1,13 +1,14 @@ read_verilog -specify << EOT module top(input a, b, output o); - wire c, d; - bb bb1 (.a (a), .b (b), .o (c)); - wb wb1 (.a (a), .b (b), .o (d)); - some_mod some_inst (.a (c), .b (d), .o (o)); + wire c, d, e; + bb #(.SOME_PARAM(1)) bb1 (.a (a), .b (b), .o (c)); + bb #(.SOME_PARAM(2)) bb2 (.a (a), .b (b), .o (d)); + wb wb1 (.a (a), .b (b), .o (e)); + some_mod some_inst (.a (c), .b (d), .c (e), .o (o)); endmodule (* blackbox *) -module bb(input a, b, output o); +module bb #( parameter SOME_PARAM=0 ) (input a, b, output o); assign o = a | b; specify (a => o) = 1; @@ -19,15 +20,20 @@ module wb(input a, b, output o); assign o = a ^ b; endmodule -module some_mod(input a, b, output o); -assign o = a & b; +module some_mod(input a, b, c, output o); +assign o = a & (b | c); endmodule EOT -select top +hierarchy -top top select -assert-count 0 t:$anyseq -select -assert-count 2 =t:?b -cutpoint -blackbox =* -select -assert-count 2 t:$anyseq -select -assert-count 2 t:?b +select -assert-count 3 =t:?b +cutpoint -blackbox + +select -assert-count 3 =t:?b +select -assert-count 2 r:SOME_PARAM +select -assert-count 1 r:SOME_PARAM=1 + +flatten +select -assert-count 3 t:$anyseq From b705c546ea71e72906590578435d347144f84dff Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 4/8] cutpoint: Add -blackbox -instances Replace module instances instead of module contents. This fixes parametrisable width mismatch with read_verilog frontend, but not verific frontend. --- passes/sat/cutpoint.cc | 49 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 5 deletions(-) diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index 573dfbd0a..58cb4a2aa 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -41,11 +41,15 @@ struct CutpointPass : public Pass { log("\n"); log("Replace the contents of all blackboxes in the design with a formal cut point.\n"); log("\n"); + log(" -instances\n"); + log(" replace instances of blackboxes instead of the modules\n"); + log("\n"); } void execute(std::vector args, RTLIL::Design *design) override { bool flag_undef = false; bool flag_blackbox = false; + bool flag_instances = false; log_header(design, "Executing CUTPOINT pass.\n"); @@ -60,23 +64,39 @@ struct CutpointPass : public Pass { flag_blackbox = true; continue; } + if (args[argidx] == "-instances") { + flag_instances = true; + continue; + } break; } extra_args(args, argidx, design); + if (flag_instances && !flag_blackbox) { + log_cmd_error("-instances flag only valid with -blackbox!\n"); + } + if (flag_blackbox) { if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); - RTLIL::Selection module_boxes(false); + RTLIL::Selection boxes(false); for (auto module : design->modules()) - if (module->get_blackbox_attribute()) - module_boxes.select(module); - design->selection_stack.push_back(module_boxes); + if (flag_instances) { + for (auto cell : module->cells()) { + auto mod = design->module(cell->type); + if (mod != nullptr && mod->get_blackbox_attribute()) + boxes.select(module, cell); + } + } else { + if (module->get_blackbox_attribute()) + boxes.select(module); + } + design->selection_stack.push_back(boxes); } for (auto module : design->all_selected_modules()) { - if (module->is_selected_whole()) { + if (module->is_selected_whole() && !flag_instances) { log("Making all outputs of module %s cut points, removing module contents.\n", log_id(module)); module->new_connections(std::vector()); for (auto cell : vector(module->cells())) @@ -107,7 +127,26 @@ struct CutpointPass : public Pass { if (cell->output(conn.first)) module->connect(conn.second, flag_undef ? Const(State::Sx, GetSize(conn.second)) : module->Anyseq(NEW_ID, GetSize(conn.second))); } + + RTLIL::Cell *scopeinfo = nullptr; + auto cell_name = cell->name; + if (flag_instances && cell_name.isPublic()) { + auto scopeinfo = module->addCell(NEW_ID, ID($scopeinfo)); + scopeinfo->setParam(ID::TYPE, RTLIL::Const("blackbox")); + + for (auto const &attr : cell->attributes) + { + if (attr.first == ID::hdlname) + scopeinfo->attributes.insert(attr); + else + scopeinfo->attributes.emplace(stringf("\\cell_%s", RTLIL::unescape_id(attr.first).c_str()), attr.second); + } + } + module->remove(cell); + + if (scopeinfo != nullptr) + module->rename(scopeinfo, cell_name); } for (auto wire : module->selected_wires()) { From 44545653ef9313bc8edb28cd13a867b01a1aea12 Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 5/8] hierarchy: Ignore width mismatch from verific But only if it's also a blackbox module with parameters (i.e. it *could* be parametrizable width). --- passes/hierarchy/hierarchy.cc | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index 8372c0339..d94b5cef6 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -978,6 +978,11 @@ struct HierarchyPass : public Pass { } } + bool verific_mod = false; +#ifdef YOSYS_ENABLE_VERIFIC + verific_mod = verific_import_pending; +#endif + if (top_mod == nullptr && !load_top_mod.empty()) { #ifdef YOSYS_ENABLE_VERIFIC if (verific_import_pending) { @@ -1418,13 +1423,18 @@ struct HierarchyPass : public Pass { if (m == nullptr) continue; - if (m->get_blackbox_attribute() && !cell->parameters.empty() && m->get_bool_attribute(ID::dynports)) { - IdString new_m_name = m->derive(design, cell->parameters, true); - if (new_m_name.empty()) - continue; - if (new_m_name != m->name) { - m = design->module(new_m_name); - blackbox_derivatives.insert(m); + bool boxed_params = false; + if (m->get_blackbox_attribute() && !cell->parameters.empty()) { + if (m->get_bool_attribute(ID::dynports)) { + IdString new_m_name = m->derive(design, cell->parameters, true); + if (new_m_name.empty()) + continue; + if (new_m_name != m->name) { + m = design->module(new_m_name); + blackbox_derivatives.insert(m); + } + } else { + boxed_params = true; } } @@ -1440,8 +1450,12 @@ struct HierarchyPass : public Pass { SigSpec sig = conn.second; - if (!keep_portwidths && GetSize(w) != GetSize(conn.second)) - { + bool resize_widths = !keep_portwidths && GetSize(w) != GetSize(conn.second); + if (resize_widths && verific_mod && boxed_params) + log_warning("Ignoring width mismatch on %s.%s.%s from verific, is port width parametrizable?\n", + log_id(module), log_id(cell), log_id(conn.first) + ); + else if (resize_widths) { if (GetSize(w) < GetSize(conn.second)) { int n = GetSize(conn.second) - GetSize(w); From 8b1cc6e05e6316e7af63d4cf9c5b9dd70298ac0b Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 6/8] cutpoint: Use new selection helpers --- passes/sat/cutpoint.cc | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index 58cb4a2aa..bac699dec 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -79,19 +79,18 @@ struct CutpointPass : public Pass { if (flag_blackbox) { if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); - RTLIL::Selection boxes(false); + design->push_empty_selection(); for (auto module : design->modules()) if (flag_instances) { for (auto cell : module->cells()) { auto mod = design->module(cell->type); if (mod != nullptr && mod->get_blackbox_attribute()) - boxes.select(module, cell); + design->select(module, cell); } } else { if (module->get_blackbox_attribute()) - boxes.select(module); + design->select(module); } - design->selection_stack.push_back(boxes); } for (auto module : design->all_selected_modules()) From 779a1fddf675635a2dafbbbf453a0a68f12a84bb Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:34 +1200 Subject: [PATCH 7/8] Testing cutpoint with boxed selections --- tests/various/.gitignore | 1 + tests/various/cutpoint_blackbox.ys | 56 ++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/tests/various/.gitignore b/tests/various/.gitignore index 83e634820..3dbd50843 100644 --- a/tests/various/.gitignore +++ b/tests/various/.gitignore @@ -1,5 +1,6 @@ /*.log /*.out +/*.sel /write_gzip.v /write_gzip.v.gz /run-test.mk diff --git a/tests/various/cutpoint_blackbox.ys b/tests/various/cutpoint_blackbox.ys index ee7a18c6a..d2d823477 100644 --- a/tests/various/cutpoint_blackbox.ys +++ b/tests/various/cutpoint_blackbox.ys @@ -26,6 +26,7 @@ endmodule EOT hierarchy -top top +design -save hier select -assert-count 0 t:$anyseq select -assert-count 3 =t:?b @@ -37,3 +38,58 @@ select -assert-count 1 r:SOME_PARAM=1 flatten select -assert-count 3 t:$anyseq +select -assert-count 3 t:$scopeinfo n:*cutpoint.cc* %i + +# cutpoint -blackbox === cutpoint =A:whitebox =A:blackbox %u +# (simplified to =A:*box) +design -load hier +cutpoint -blackbox +rename -enumerate -pattern A_% t:$scopeinfo +rename -enumerate -pattern B_% t:$anyseq +rename -enumerate -pattern C_% w:*Anyseq* +design -save gold +select -write cutpoint.gold.sel =* + +design -load hier +cutpoint =A:*box +rename -enumerate -pattern A_% t:$scopeinfo +rename -enumerate -pattern B_% t:$anyseq +rename -enumerate -pattern C_% w:*Anyseq* +design -save gate +select -write cutpoint.gate.sel +select -read cutpoint.gold.sel +# nothing in gate but not gold +select -assert-none % %n + +design -load gold +select -read cutpoint.gate.sel +# nothing in gold but not gate +select -assert-none % %n + +# cutpoint -blackbox -instances !== cutpoint =A:whitebox =A:blackbox %u %C +# (simplified to =A:*box %C) +# because cutpoint -blackbox -instances adds $scopeinfo cells +design -load hier +cutpoint -blackbox -instances +rename -enumerate -pattern A_% t:$scopeinfo +rename -enumerate -pattern B_% t:$anyseq +rename -enumerate -pattern C_% w:*Anyseq* +design -save gold +select -write cutpoint.gold.sel =* + +design -load hier +cutpoint =A:*box %C +rename -enumerate -pattern A_% t:$scopeinfo +rename -enumerate -pattern B_% t:$anyseq +rename -enumerate -pattern C_% w:*Anyseq* +design -save gate +select -write cutpoint.gate.sel +select -read cutpoint.gold.sel +# nothing in gate but not gold +select -assert-none % %n + +design -load gold +select -read cutpoint.gate.sel +# 3 $scopeinfo in gold but not gate +select -assert-count 3 % %n +select -assert-count 3 t:$scopeinfo From 87d3b09988a486646aeb72fbf233484ebc7ed580 Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Fri, 11 Apr 2025 04:12:35 +1200 Subject: [PATCH 8/8] cutpoint.cc: Fold -instances into -blackbox Replace `cutpoint -blackbox` behaviour with `cutpoint -blackbox -instances` behaviour. Drop `-instances` flag. Add `-noscopeinfo` flag. Use `RTLIL::Selection::boxed_module()` helper to shortcut blackbox check. Update `cutpoint_blackbox.ys` tests to match. --- passes/sat/cutpoint.cc | 59 ++++++++---------------------- tests/various/cutpoint_blackbox.ys | 51 +++++++------------------- 2 files changed, 29 insertions(+), 81 deletions(-) diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index bac699dec..7f0dc2fcf 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -37,19 +37,20 @@ struct CutpointPass : public Pass { log(" set cutpoint nets to undef (x). the default behavior is to create\n"); log(" an $anyseq cell and drive the cutpoint net from that\n"); log("\n"); + log(" -noscopeinfo\n"); + log(" do not create '$scopeinfo' cells that preserve attributes of cells that\n"); + log(" were removed by this pass\n"); + log("\n"); log(" cutpoint -blackbox [options]\n"); log("\n"); - log("Replace the contents of all blackboxes in the design with a formal cut point.\n"); - log("\n"); - log(" -instances\n"); - log(" replace instances of blackboxes instead of the modules\n"); + log("Replace all instances of blackboxes in the design with a formal cut point.\n"); log("\n"); } void execute(std::vector args, RTLIL::Design *design) override { bool flag_undef = false; + bool flag_scopeinfo = true; bool flag_blackbox = false; - bool flag_instances = false; log_header(design, "Executing CUTPOINT pass.\n"); @@ -60,61 +61,31 @@ struct CutpointPass : public Pass { flag_undef = true; continue; } - if (args[argidx] == "-blackbox") { - flag_blackbox = true; + if (args[argidx] == "-noscopeinfo") { + flag_scopeinfo = false; continue; } - if (args[argidx] == "-instances") { - flag_instances = true; + if (args[argidx] == "-blackbox") { + flag_blackbox = true; continue; } break; } extra_args(args, argidx, design); - if (flag_instances && !flag_blackbox) { - log_cmd_error("-instances flag only valid with -blackbox!\n"); - } - if (flag_blackbox) { if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); design->push_empty_selection(); + auto &selection = design->selection(); for (auto module : design->modules()) - if (flag_instances) { - for (auto cell : module->cells()) { - auto mod = design->module(cell->type); - if (mod != nullptr && mod->get_blackbox_attribute()) - design->select(module, cell); - } - } else { - if (module->get_blackbox_attribute()) - design->select(module); - } + for (auto cell : module->cells()) + if (selection.boxed_module(cell->type)) + selection.select(module, cell); } for (auto module : design->all_selected_modules()) { - if (module->is_selected_whole() && !flag_instances) { - log("Making all outputs of module %s cut points, removing module contents.\n", log_id(module)); - module->new_connections(std::vector()); - for (auto cell : vector(module->cells())) - module->remove(cell); - vector output_wires; - for (auto wire : module->wires()) - if (wire->port_output) - output_wires.push_back(wire); - for (auto wire : output_wires) - module->connect(wire, flag_undef ? Const(State::Sx, GetSize(wire)) : module->Anyseq(NEW_ID, GetSize(wire))); - if (module->get_blackbox_attribute()) { - module->set_bool_attribute(ID::blackbox, false); - module->set_bool_attribute(ID::whitebox, false); - auto scopeinfo = module->addCell(NEW_ID, ID($scopeinfo)); - scopeinfo->setParam(ID::TYPE, RTLIL::Const("blackbox")); - } - continue; - } - SigMap sigmap(module); pool cutpoint_bits; @@ -129,7 +100,7 @@ struct CutpointPass : public Pass { RTLIL::Cell *scopeinfo = nullptr; auto cell_name = cell->name; - if (flag_instances && cell_name.isPublic()) { + if (flag_scopeinfo && cell_name.isPublic()) { auto scopeinfo = module->addCell(NEW_ID, ID($scopeinfo)); scopeinfo->setParam(ID::TYPE, RTLIL::Const("blackbox")); diff --git a/tests/various/cutpoint_blackbox.ys b/tests/various/cutpoint_blackbox.ys index d2d823477..ee479b968 100644 --- a/tests/various/cutpoint_blackbox.ys +++ b/tests/various/cutpoint_blackbox.ys @@ -28,20 +28,25 @@ EOT hierarchy -top top design -save hier -select -assert-count 0 t:$anyseq +select -assert-none t:$anyseq select -assert-count 3 =t:?b cutpoint -blackbox -select -assert-count 3 =t:?b -select -assert-count 2 r:SOME_PARAM -select -assert-count 1 r:SOME_PARAM=1 +select -assert-none =t:?b +select -assert-none r:SOME_PARAM -flatten select -assert-count 3 t:$anyseq +select -assert-count 3 t:$scopeinfo +select -assert-count 3 t:$scopeinfo r:TYPE=blackbox %i select -assert-count 3 t:$scopeinfo n:*cutpoint.cc* %i -# cutpoint -blackbox === cutpoint =A:whitebox =A:blackbox %u -# (simplified to =A:*box) +# -noscopeinfo works with -blackbox +design -load hier +cutpoint -blackbox -noscopeinfo +select -assert-none t:$scopeinfo + +# cutpoint -blackbox === cutpoint =A:whitebox =A:blackbox %u %C +# (simplified to =A:*box %C) design -load hier cutpoint -blackbox rename -enumerate -pattern A_% t:$scopeinfo @@ -50,33 +55,6 @@ rename -enumerate -pattern C_% w:*Anyseq* design -save gold select -write cutpoint.gold.sel =* -design -load hier -cutpoint =A:*box -rename -enumerate -pattern A_% t:$scopeinfo -rename -enumerate -pattern B_% t:$anyseq -rename -enumerate -pattern C_% w:*Anyseq* -design -save gate -select -write cutpoint.gate.sel -select -read cutpoint.gold.sel -# nothing in gate but not gold -select -assert-none % %n - -design -load gold -select -read cutpoint.gate.sel -# nothing in gold but not gate -select -assert-none % %n - -# cutpoint -blackbox -instances !== cutpoint =A:whitebox =A:blackbox %u %C -# (simplified to =A:*box %C) -# because cutpoint -blackbox -instances adds $scopeinfo cells -design -load hier -cutpoint -blackbox -instances -rename -enumerate -pattern A_% t:$scopeinfo -rename -enumerate -pattern B_% t:$anyseq -rename -enumerate -pattern C_% w:*Anyseq* -design -save gold -select -write cutpoint.gold.sel =* - design -load hier cutpoint =A:*box %C rename -enumerate -pattern A_% t:$scopeinfo @@ -90,6 +68,5 @@ select -assert-none % %n design -load gold select -read cutpoint.gate.sel -# 3 $scopeinfo in gold but not gate -select -assert-count 3 % %n -select -assert-count 3 t:$scopeinfo +# nothing in gold but not gate +select -assert-none % %n