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Remove output_bits

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This commit is contained in:
Eddie Hung 2019-08-22 11:14:59 -07:00
parent 231ddbf95c
commit 74bd190d3b
2 changed files with 7 additions and 16 deletions
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13
passes/pmgen/xilinx_srl.cc
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@ -214,19 +214,8 @@ struct XilinxSrlPass : public Pass {
pm.ud_fixed.default_params[std::make_pair(ID(FDRE),ID(IS_R_INVERTED))] = State::S0;
pm.run_fixed(run_fixed);
}
if (variable) {
// Since `nusers` does not count module ports as a user,
// and since `sigmap` does not always make such ports
// the canonical signal.. need to maintain a pool these
// ourselves
for (auto p : module->ports) {
auto w = module->wire(p);
if (w->port_output)
for (auto b : pm.sigmap(w))
pm.ud_variable.output_bits.insert(b);
}
if (variable)
pm.run_variable(run_variable);
}
}
}
} XilinxSrlPass;