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s/NEW_ID/NEWER_ID/g

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This commit is contained in:
Emil J. Tywoniak 2025-09-16 17:43:02 +02:00
parent 6b9082fa64
commit 73d51b25d6
130 changed files with 1275 additions and 1275 deletions
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18
passes/sat/assertpmux.cc
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@ -100,12 +100,12 @@ struct AssertpmuxWorker
if (muxport_actsignal.count(muxport) == 0) {
if (portidx == 0)
muxport_actsignal[muxport] = module->LogicNot(NEW_ID, cell->getPort(ID::S));
muxport_actsignal[muxport] = module->LogicNot(NEWER_ID, cell->getPort(ID::S));
else
muxport_actsignal[muxport] = cell->getPort(ID::S)[portidx-1];
}
output.append(module->LogicAnd(NEW_ID, muxport_actsignal.at(muxport), get_bit_activation(cell->getPort(ID::Y)[bitidx])));
output.append(module->LogicAnd(NEWER_ID, muxport_actsignal.at(muxport), get_bit_activation(cell->getPort(ID::Y)[bitidx])));
}
output.sort_and_unify();
@ -113,7 +113,7 @@ struct AssertpmuxWorker
if (GetSize(output) == 0)
output = State::S0;
else if (GetSize(output) > 1)
output = module->ReduceOr(NEW_ID, output);
output = module->ReduceOr(NEWER_ID, output);
sigbit_actsignals[bit] = output.as_bit();
}
@ -138,7 +138,7 @@ struct AssertpmuxWorker
if (GetSize(output) == 0)
output = State::S0;
else if (GetSize(output) > 1)
output = module->ReduceOr(NEW_ID, output);
output = module->ReduceOr(NEWER_ID, output);
sigspec_actsignals[sig] = output.as_bit();
}
@ -157,13 +157,13 @@ struct AssertpmuxWorker
SigSpec cnt(State::S0, cntbits);
for (int i = 0; i < swidth; i++)
cnt = module->Add(NEW_ID, cnt, sel[i]);
cnt = module->Add(NEWER_ID, cnt, sel[i]);
SigSpec assert_a = module->Le(NEW_ID, cnt, SigSpec(1, cntbits));
SigSpec assert_a = module->Le(NEWER_ID, cnt, SigSpec(1, cntbits));
SigSpec assert_en;
if (flag_noinit)
assert_en.append(module->LogicNot(NEW_ID, module->Initstate(NEW_ID)));
assert_en.append(module->LogicNot(NEWER_ID, module->Initstate(NEWER_ID)));
if (!flag_always)
assert_en.append(get_activation(pmux->getPort(ID::Y)));
@ -172,9 +172,9 @@ struct AssertpmuxWorker
assert_en = State::S1;
if (GetSize(assert_en) == 2)
assert_en = module->LogicAnd(NEW_ID, assert_en[0], assert_en[1]);
assert_en = module->LogicAnd(NEWER_ID, assert_en[0], assert_en[1]);
Cell *assert_cell = module->addAssert(NEW_ID, assert_a, assert_en);
Cell *assert_cell = module->addAssert(NEWER_ID, assert_a, assert_en);
if (pmux->attributes.count(ID::src) != 0)
assert_cell->attributes[ID::src] = pmux->attributes.at(ID::src);