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Remove wide mux inference

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Eddie Hung 2019-06-12 09:20:46 -07:00
parent b2c72f74f0
commit 738fdfe8f5
5 changed files with 3 additions and 195 deletions
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@ -18,7 +18,6 @@ Yosys 0.8 .. Yosys 0.8-dev
- Added "equiv_opt" pass
- Added "read_aiger" frontend
- "synth_xilinx" to now infer hard shift registers, using new "shregmap -tech xilinx"
- "synth_xilinx" to now infer wide multiplexers
Yosys 0.7 .. Yosys 0.8