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ast/simplify: Retire 'at_zero' flag
Now that all the callsites pass in 'false' for the flag (or propagate the flag on recursion), we can retire it.
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4 changed files with 109 additions and 111 deletions
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@ -1061,7 +1061,7 @@ static RTLIL::Module *process_module(RTLIL::Design *design, AstNode *ast, bool d
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// simplify this module or interface using the current design as context
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// for lookup up ports and wires within cells
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set_simplify_design_context(design);
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while (ast->simplify(!flag_noopt, false, false, 0, -1, false, false)) { }
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while (ast->simplify(!flag_noopt, false, 0, -1, false, false)) { }
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set_simplify_design_context(nullptr);
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if (flag_dump_ast2) {
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@ -1361,7 +1361,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
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}
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else if (child->type == AST_PACKAGE) {
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// process enum/other declarations
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child->simplify(true, false, false, 1, -1, false, false);
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child->simplify(true, false, 1, -1, false, false);
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rename_in_package_stmts(child);
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design->verilog_packages.push_back(child->clone());
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current_scope.clear();
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