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abc9: not enough to techmap_fail on (* init=1 *), hide them using $__
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4 changed files with 48 additions and 12 deletions
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@ -50,7 +50,7 @@ $_DFF_P_ ff(.C(clk), .D(d), .Q(w));
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assign q = w;
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endmodule
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EOT
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equiv_opt abc9 -lut 4 -dff
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equiv_opt -assert abc9 -lut 4 -dff
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design -load postopt
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cd abc9_test036
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select -assert-count 1 t:$_DFF_P_
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@ -69,8 +69,27 @@ specify
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endspecify
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endmodule
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module top(input [1:0] i, output o);
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module abc9_test037(input [1:0] i, output o);
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LUT2 #(.mask(4'b0)) lut (.i(i), .o(o));
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endmodule
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EOT
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abc9
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design -reset
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read_verilog -icells <<EOT
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module abc9_test038(input clk, output w, x, y);
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(* init=1'b1 *) wire w;
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$_DFF_N_ ff1(.C(clk), .D(1'b1), .Q(w));
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(* init=1'bx *) wire x;
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$_DFF_N_ ff2(.C(clk), .D(1'b0), .Q(x));
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(* init=1'b0 *) wire y;
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$_DFF_N_ ff3(.C(clk), .D(1'b0), .Q(y));
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endmodule
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EOT
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simplemap
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equiv_opt abc9 -lut 4 -dff
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design -load postopt
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cd abc9_test038
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select -assert-count 2 t:$_DFF_N_
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select -assert-none c:ff1 c:ff2 %% c:* %D
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