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Added basic support for $expect cells

This commit is contained in:
Clifford Wolf 2016-07-13 16:56:17 +02:00
parent b3155af5f6
commit 721f1f5ecf
16 changed files with 82 additions and 19 deletions

View file

@ -1017,14 +1017,7 @@ namespace {
return;
}
if (cell->type == "$assert") {
port("\\A", 1);
port("\\EN", 1);
check_expected();
return;
}
if (cell->type == "$assume") {
if (cell->type.in("$assert", "$assume", "$expect")) {
port("\\A", 1);
port("\\EN", 1);
check_expected();
@ -1795,6 +1788,22 @@ RTLIL::Cell* RTLIL::Module::addAssert(RTLIL::IdString name, RTLIL::SigSpec sig_a
return cell;
}
RTLIL::Cell* RTLIL::Module::addAssume(RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_en)
{
RTLIL::Cell *cell = addCell(name, "$assume");
cell->setPort("\\A", sig_a);
cell->setPort("\\EN", sig_en);
return cell;
}
RTLIL::Cell* RTLIL::Module::addExpect(RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_en)
{
RTLIL::Cell *cell = addCell(name, "$expect");
cell->setPort("\\A", sig_a);
cell->setPort("\\EN", sig_en);
return cell;
}
RTLIL::Cell* RTLIL::Module::addEquiv(RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_b, RTLIL::SigSpec sig_y)
{
RTLIL::Cell *cell = addCell(name, "$equiv");